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Volumn , Issue , 2012, Pages 2353-2356

A 9.2b 47fJ/conversion-step asynchronous SAR ADC with input range prediction DAC switching

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; CONVENTIONAL APPROACH; INPUT SIGNAL; LOW POWER APPLICATION; SAMPLING RATES; SAR ADC; SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER; SWITCHING ENERGY; SWITCHING TECHNIQUES;

EID: 84866634822     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271768     Document Type: Conference Paper
Times cited : (12)

References (9)
  • 1
    • 34748918257 scopus 로고    scopus 로고
    • A 65-fJ/Conversion-Step 0. 9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC
    • Oct
    • Hao-Chiao Hong and Guo-Ming Lee,"A 65-fJ/Conversion-Step 0. 9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC," Solid-State Circuits, IEEE Journal of, vol. 42, NO. 10, pp. 2161-2168, Oct. 2007.
    • (2007) Solid-State Circuits, IEEE Journal of , vol.42 , Issue.10 , pp. 2161-2168
    • Hong, H.1    Lee, G.2
  • 2
    • 79952071655 scopus 로고    scopus 로고
    • A 21 fJ/Conversion-Step 100kS/s 10-bit ADC with a Low-Noise Time-Domain Comparator for Low Power Sensor Interface
    • Apr
    • S.-K. Lee, S.-J. Park, Y. Suh, H.-J. Park, and J.-Y. Sim,"A 21 fJ/Conversion-Step 100kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low Power Sensor Interface," IEEE J Solid-State Circuits.,vol. 46, no. 3, pp. 651-659, Apr. 2011.
    • (2011) IEEE J Solid-State Circuits. , vol.46 , Issue.3 , pp. 651-659
    • Lee, S.-K.1    Park, S.-J.2    Suh, Y.3    Park, H.-J.4    Sim, J.-Y.5
  • 3
    • 34548857452 scopus 로고    scopus 로고
    • A 25uw 100KS/s 12b ADC for wireless micro-sensor applications
    • Feb
    • N. Verma and A. P. Chandrakasan,"A 25uw 100KS/s 12b ADC for wireless micro-sensor applications," ISSCC Dig. Tech. Papers, pp. 222-223, Feb. 2006.
    • (2006) ISSCC Dig. Tech. Papers , pp. 222-223
    • Verma, N.1    Chandrakasan, A.P.2
  • 5
    • 80052678511 scopus 로고    scopus 로고
    • A 0. 5V 1. 1MS/s 6. 3fJ/Conversion-step SAR ADC with Tri-Level Comparator in40nm CMOS
    • Jun
    • Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, and Hiroki Ishikuro,"A 0. 5V 1. 1MS/s 6. 3fJ/Conversion-step SAR ADC with Tri-Level Comparator in40nm CMOS," in VLSI Symp. Tech. Dig., Jun. 2011,pp. 262-263.
    • (2011) VLSI Symp. Tech. Dig. , pp. 262-263
    • Shikata, A.1    Sekimoto, R.2    Kuroda, T.3    Ishikuro, H.4
  • 6
    • 77950287759 scopus 로고    scopus 로고
    • A 10-bit 50-MS/s SAR ADC with Monotonic Capacitor Switching Procedure
    • Apr
    • C.-C. Liu, S.-J. Chang, G.-Y. Huang, and Y.-Z. Lin,"A 10-bit 50-MS/s SAR ADC With Monotonic Capacitor Switching Procedure," IEEE J Solid-State Circuits.,vol. 45, no. 4, pp. 731-740, Apr. 2010.
    • (2010) IEEE J Solid-State Circuits. , vol.45 , Issue.4 , pp. 731-740
    • Liu, C.-C.1    Chang, S.-J.2    Huang, G.-Y.3    Lin, Y.-Z.4
  • 7
    • 33847731110 scopus 로고    scopus 로고
    • An energy-efficient charge recycling approach for a SAR converter with capacitve DAC
    • B. P. Ginburg and A. P. Chandrakasan,"An energy-efficient charge recycling approach for a SAR converter with capacitve DAC," in Proc. IEEE Int. Symp. Circuit and Systems, 2005, vol. 1, pp. 813-819
    • (2005) Proc. IEEE Int. Symp. Circuit and Systems , vol.1 , pp. 813-819
    • Ginburg, B.P.1    Chandrakasan, A.P.2
  • 8
    • 76249095244 scopus 로고    scopus 로고
    • A 10-bit 500KS/s Low Power SAR ADC with splitting Comparator for Bio-Medical Applications
    • Nov
    • W. Y. Pang, C. Y. Wang, Y. K. Chang, N. K. Chou, and C. K. Wang,"A 10-bit 500KS/s Low Power SAR ADC with splitting Comparator for Bio-Medical Applications. A-SSCC Dig. Tech. Papers, pp. 149-152,Nov. 2009.
    • (2009) A-SSCC Dig. Tech. Papers , pp. 149-152
    • Pang, W.Y.1    Wang, C.Y.2    Chang, Y.K.3    Chou, N.K.4    Wang, C.K.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.