Novel highly nonlinear memristive circuit elements for neural networks

Proceedings of the International Joint Conference on Neural Networks

Volumn , Issue , 2012, Pages

  Liu, Tong ^a   Kang, Yuhong ^a   Verma, Mohini ^a   Orlowski, Marius ^a  

^a State University   (United States)

Author keywords

memristive switches; neural hardware; nonlinear circuits; spiking neuron

Indexed keywords

CIRCUIT ELEMENTS; CROSSBAR ARCHITECTURE; CURRENT LEVELS; FLOATING ELECTRODES; HIGHLY NONLINEAR; NEURAL HARDWARE; NONLINEAR CIRCUIT; ORDERS OF MAGNITUDE; SPIKE-TIMING-DEPENDENT PLASTICITY; SPIKING NEURON; THRESHOLD TRANSITIONS;

MEMRISTORS; PASSIVE FILTERS; PLATINUM; RESISTORS;

NEURAL NETWORKS;

EID: 84865065834     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2012.6252460     Document Type: Conference Paper

References (17)

1. O. Snider, "Spike-timing-dependent learning in memristive nanodevices ", in Proc. IEEEIACM Int. Symp. Nanoscale Architectures, 2008, pp. 85-92.
2. O. Snider, "Instar and outstar learning with memristive nanodevices," Nanotechnol., vol. 22, p. 015201, Jan. 2011.
3. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems," Nano Lett., vol. 10, no. 4, pp.1297-1301, Apr. 2010
4. L. Chua, "Resistance switching memories are memristors," Appl.Phys. A, vol. 102, no. 4, pp. 765-783, Mar. 2011.
5. I. Valov, R. Waser, J. R. Jameson, and M. N. Kozicki, "Electrochemical metallization memries-fundamentals, applications, prospects," Nanotechnol., vol. 22, no. 25, p. 254003, Jun. 2011.
6. 5 solidelectrolyte switch with improved reliability," in VLSI Symp. Tech. Dig., 2007,pp. 38-39
7. Y. Kang, T. Liu, M. Verma, and M. Orlowski, "Program and erase operation of a floating electrode bi-resistive device using compliance current constraint," IEEE Trans. Electron Devices, submitted for publication.
8. U. Russo, D. Kamalanathan, D. lelmini, A. L. Lacaita, and M. N. Kozicki, "Study of multilevel programming in programmable metallization cell (PMC) memory," IEEE Trans. Electron Devices, vol. 56, no. 5, pp. 1040-1047, May 2009.
9. S. H. Jo, K.-H. Kim, and W. Lu, "Programmable Resistance Switching in Nanoscale Two-Terminal Devices," Nano Lett., vol. 9, no. I, pp. 496- 500, Jan. 2009.
10. 2- based resistive switching cells: overcoming the voltage-time dilemma of electrochemical metallization memories," Appl. Phys. Lett., vol. 94, no. 7,p. 072109,Feb. 2009.
11. G. Meszaros, I. Szenes, and B. Lengyel, "Measurements of charge transfer noise," Electrochem. Commun., vol. 6, no. 11, pp. 1185-1191, Nov. 2004.
12. 2 stack ReRAM," IEEE Electron Device Lett., vol. 31, no. 11, pp. 1302-1304, Nov. 2010.
13. T. Hasegawa, A. Nayak, T. Ohno, K. Terabe, T. Tsuruoka, J. K. Girnzewski, and M. Aono, "Memristive operations demonstrated by gaptype atomic switches," Appl. Phys. A, vol. 102, no. 4, pp. 811-815, Mar. 2011.
14. S.-J. Choi, G. -B. Kim, K. Lee, K. -H. Kim, W. -Y. Yang, S. Cho, H.-J. Bae, D. -S. Seo, S.-I. Kim, and K.-J. Lee, "Synaptic behaviors of a single metal-oxide resistive device," Appl. Phys. A, vol. 102, no. 4, pp. 1019- 1025, Mar. 2011.
15. Y. Kang, M. Verma, T. Liu, M. Orlowski, "Firing of a pulse and its control using a novel floating electrode bi-resistive device," in Proc. 2012 Mater. Res. Soc. Spring Meeting, San Francisco, April 2012, in press.
16. W. Gerstner and W. M. Kistler, Spiking Neuron Models. Cambridge, U.K.: Cambridge U niv. Press, 2002.
17. 2:CulPt device," Appl. Phys. Lett., vol. 95, no. 2, p. 023501, Jul. 2009.