Sparse matrix-vector multiply on the HICAMP architecture

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2012, Pages 195-204

  Stevenson, John P ^a   Firoozshahian, Amin ^b   Solomatnikov, Alex ^b   Horowitz, Mark ^a   Cheriton, David ^a  

^a STANFORD UNIVERSITY   (United States)

^b Hicamp Systems   (United States)

Author keywords

Deduplication; HICAMP; SpMV

Indexed keywords

CRITICAL TASKS; DATA REUSE; DEDUPLICATION; FULLY COMPATIBLE; HICAMP; INNER LOOPS; LINEAR SYSTEM SOLVER; MAIN-MEMORY; MATRIX VECTOR MULTIPLY; NON-SYMMETRIC MATRICES; PERFORMANCE BOUNDS; PROCESSOR CACHE; RANDOM PATTERN; SPARSE MATRICES; SPECIALIZED HARDWARE; SPMV; STORAGE FORMATS; SYMMETRIC MATRICES; THREAD SYNCHRONIZATION;

COMPUTER ARCHITECTURE; INTELLIGENT CONTROL; LINEAR SYSTEMS;

MATRIX ALGEBRA;

EID: 84864047435     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2304576.2304603     Document Type: Conference Paper

References (25)

1. A. Bechtolsheim. Technologies for Data-Intensive Computing. In Proceedings of the 13th International Workshop on High Performance Transaction Systems. HPTS, October 2009.
2. M. Belgin, G. Back, and C. J. Ribbens. Pattern-based Sparse Matrix Representation for Memory-Efficient SMVM Kernels. In Proceedings of the 23rd International Conference on Supercomputing (ICS '09), pages 100-109. ACM, June 2009.
3. N. Bell and M. Garland. Implementing Sparse Matrix-Vector Multiplication on Throughput-Oriented Processors. In Proceedings of Supercomputing (SC '09), pages 18:1-18:11. ACM, November 2009.
4. G. Blelloch, I. Koutis, G. Miller, and K. Tangwongsan. Hierarchical Diagonal Blocking and Precision Reduction Applied to Combinatorial Multigrid. In Proceedings of Supercomputing (SC '10), pages 1-12, November 2010.
5. S. Borkar and A. A. Chien. The Future of Microprocessors. Communications of the ACM, 54:67-77, May 2011.
6. A. Buluç, J. T. Fineman, M. Frigo, J. R. Gilbert, and C. E. Leiserson. Parallel Sparse Matrix-Vector and Matrix-Transpose-Vector Multiplication Using Compressed Sparse Blocks. In Proceedings of the 21st Annual Symposium on Parallelism in Algorithms and Architectures, SPAA '09, pages 233-244. ACM, 2009.
7. A. Buluç, S. Williams, L. Oliker, and J. Demmel. Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication. In International Parallel Distributed Processing Symposium (IPDPS), 2011 IEEE International, pages 721-733, May 2011.
8. D. R. Cheriton. Hierarchical Immutable Content-Addressable Memory Processor, January 2010. U.S. Patent 7650460.
9. D. R. Cheriton, A. Firoozshahian, A. Solomatnikov, J. P. Stevenson, and O. Azizi. HICAMP: Architectural Support for Efficient Concurrency-Safe Shared Structured Data Access. In Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS '12, pages 287-300, New York, NY, USA, 2012. ACM.
10. T. A. Davis and Y. Hu. The University of Florida Sparse Matrix Collection. ACM Trans. Math. Softw., 38:1:1-1:25, November 2011.
11. R. Gonzalez. Xtensa: A Configurable and Extensible Processor. Micro, IEEE, 20(2):60-70, Mar/Apr 2000. (Pubitemid 30585385)
12. E.-J. Im, K. A. Yelick, and R. Vuduc. SPARSITY: Framework for Optimizing Sparse Matrix-Vector Multiply. International Journal of High Performance Computing Applications, 18(1):135-158, February 2004.
13. K. Kourtis, G. Goumas, and N. Koziris. Improving the Performance of Multithreaded Sparse Matrix-Vector Multiplication Using Index and Value Compression. In 37th International Conference on Parallel Processing (ICPP '08), pages 511-519, September 2008.
14. K. Kourtis, G. Goumas, and N. Koziris. Optimizing Sparse Matrix-Vector Multiplication Using Index and Value Compression. In Proceedings of the 5th Conference on Computing Frontiers (CF '08), pages 87-96. ACM, May 2008.
15. K. Kourtis, V. Karakasis, G. Goumas, and N. Koziris. CSX: An Extended Compression Format for SpMV on Shared Memory Systems. In Proceedings of the 16th ACM Symposium on Principles and Practice of Parallel Programming, pages 247-256, February 2011.
16. M. Krotkiewski and M. Dabrowski. Parallel Symmetric Sparse Matrix-Vector Product on Scalar Multi-Core CPUs. Parallel Computing, 36(4):181 - 198, 2010.
17. M. Martone, S. Filippone, P. Gepner, M. Paprzycki, and S. Tucci. Use of Hybrid Recursive CSR/COO Data Structures in Sparse Matrix-Vector Multiplication. In IMCSIT, pages 327-335, October 2010.
18. J. D. McCalpin. Memory Bandwidth and Machine Balance in Current High Performance Computers. IEEE Computer Society Technical Committee on Computer Architecture (TCCA) Newsletter, pages 19-25, December 1995.
19. K. K. Nagar and J. D. Bakos. A Sparse Matrix Personality for the Convey HC-1. In Proceedings of the 19th Annual Symposium on Field-Programmable Custom Computing Machines (FCCM '11), pages 1-8. IEEE, May 2011.
20. S. Toledo. Improving the Memory-System Performance of Sparse-Matrix Vector Multiplication. IBM Journal of Research and Development, 41(6):711-725, November 1997. (Pubitemid 127557044)
21. J. Treibig, G. Hager, and G. Wellein. LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments. In Proceedings the International Workshop on Parallel Software Tools and Tool Infrastructures, 2010.
22. R. Vuduc, J. W. Demmel, and K. A. Yelick. OSKI: A Library of Automatically Tuned Sparse Matrix Kernels. In Proceedings of SciDAC 2005, Journal of Physics: Conference Series, San Francisco, CA, USA, June 2005. Institute of Physics Publishing.
23. R. Vuduc, J. W. Demmel, K. A. Yelick, S. Kamil, R. Nishtala, and B. Lee. Performance Optimizations and Bounds for Sparse Matrix-Vector Multiply. In Proceedings of Supercomputing (SC '02), Baltimore, MD, USA, November 2002.
24. J. Willcock and A. Lumsdaine. Accelerating Sparse Matrix Computations via Data Compression. In Proceedings of the 20th International Conference on Supercomputing (ICS '06), pages 307-316. ACM, June 2006. (Pubitemid 47168517)
25. S. Williams, L. Oliker, R. Vuduc, J. Shalf, K. Yelick, and J. Demmel. Optimization of Sparse Matrix-Vector Multiplication on Emerging Multicore Platforms. In Proceedings of Supercomputing (SC '07), pages 38:1-38:12. ACM, November 2007.