Parallel symmetric sparse matrix-vector product on scalar multi-core CPUs

Parallel Computing

Volumn 36, Issue 4, 2010, Pages 181-198

  Krotkiewski, M ^a   Dabrowski, M ^a  

^a UNIVERSITY OF OSLO   (Norway)

Author keywords

Memory bounded algorithms; Multi core architectures; Symmetric sparse matrix vector multiplication; Unstructured meshes

Indexed keywords

BOUNDED ALGORITHMS; CORE PERFORMANCE; DEGREES OF FREEDOM; DIFFUSION PROBLEMS; DISCRETIZATIONS; MATRIX; MECHANICAL ELEMENTS; MEMORY BANDWIDTHS; MESH NODES; MULTI CORE; MULTICORE ARCHITECTURES; OPTERON; PARALLEL EFFICIENCY; PARALLEL IMPLEMENTATIONS; PREFETCHING; SPARSE MATRICES; SPARSE MATRIX-VECTOR MULTIPLICATION; STORAGE REQUIREMENTS; SUSTAINED PERFORMANCE; SYMMETRIC MATRICES; UNSTRUCTURED MESHES; VARIABLE STRUCTURES;

FINITE ELEMENT METHOD; PROGRAM PROCESSORS; SHAPE MEMORY EFFECT;

VECTORS;

EID: 77949657892     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.parco.2010.02.003     Document Type: Article

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