Improving the memory-system performance of sparse-matrix vector multiplication

IBM Journal of Research and Development

Volumn 41, Issue 6, 1997, Pages 711-725

  Toledo, S ^a,b,c,d  

^a PALO ALTO RESEARCH CENTER   (United States)

^b TEL AVIV UNIVERSITY   (Israel)

^c MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^d IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTATIONAL METHODS; MATRIX ALGEBRA; PROGRAM PROCESSORS; REDUCED INSTRUCTION SET COMPUTING; RESPONSE TIME (COMPUTER SYSTEMS); STORAGE ALLOCATION (COMPUTER); VECTORS;

SPARSE MATRIX VECTOR MULTIPLICATION;

PARALLEL PROCESSING SYSTEMS;

EID: 0031269220     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.416.0711     Document Type: Article

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