High-precision LDPC codes decoding at the lowest complexity

European Signal Processing Conference

Volumn , Issue , 2006, Pages

  Rovini, Massimo ^a   Rossi, Francesco ^a   L'Insalata, Nicola E ^a   Fanucci, Luca ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CHECK NODES; CMOS TECHNOLOGY; HIGH-PRECISION; LDPC CODES; LOGIC SYNTHESIS; LOW-COMPLEXITY; MIN-SUM DECODING; RANDOM CODES; SERIAL ARCHITECTURE;

CMOS INTEGRATED CIRCUITS; DECODING; LOGIC DESIGN; SIGNAL PROCESSING;

ERROR CORRECTION;

EID: 84862627320     PISSN: 22195491     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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