Feasibility of current measurements in sub 0.25-micron VLSIs

Proceedings - 2000 IEEE International Workshop on Defect Based Testing

Volumn , Issue , 2000, Pages 3-8

  Keshavarzi, A ^a   Borkar, S ^a   De, V ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; RECONFIGURABLE HARDWARE; THRESHOLD VOLTAGE;

DEEP-SUBMICRON CMOS INTEGRATED CIRCUITS; HIGH-PERFORMANCE IC; SCALED TECHNOLOGIES; TECHNOLOGY SCALING; TEST SOLUTIONS; TEST TECHNIQUES; TESTING SENSITIVITY; TRANSISTOR PARAMETERS;

CMOS INTEGRATED CIRCUITS;

EID: 84862359978     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DBT.2000.843683     Document Type: Conference Paper

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