Analog circuit design using graded-channel SOI nMOSFETs

Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001

Volumn , Issue , 2001, Pages 130-135

  Pavanello, M A ^a,b   Martino, J A ^a   Flandre, D ^a,c  

^a UNIVERSITY OF SÃO PAULO   (Brazil)

^b UNIVERSITY OF CAMPINAS   (Brazil)

^c UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); ANALOG CIRCUITS; DESIGN; ELECTRIC BREAKDOWN; MOSFET DEVICES; OPERATIONAL AMPLIFIERS; RECONFIGURABLE HARDWARE; SILICON ON INSULATOR TECHNOLOGY; SYSTEMS ANALYSIS; TRANSCONDUCTANCE; TRANSISTORS;

ANALOG CIRCUIT DESIGN; FULLY DEPLETED SOI; INTRINSIC GATE CAPACITANCE; OUTPUT CONDUCTANCE; SILICON-ON-INSULATOR MOSFETS; SINGLE TRANSISTORS; TWO-DIMENSIONAL SIMULATIONS; UNITY-GAIN FREQUENCIES;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 84860991457     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2001.953015     Document Type: Conference Paper

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