An MOS transistor model for analog circuit design

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 10, 1998, Pages 1510-1519

  Cunha, Ana Isabela Araújo ^a,b,c   Schneider, Márcio Cherem ^a,c,d,e,f   Galup Montoro, Carlos ^a,c,d,g  

^a IEEE   (Brazil)

^b FEDERAL UNIVERSITY OF BAHIA   (Brazil)

^c FEDERAL UNIVERSITY OF SANTA CATARINA   (Brazil)

^d UNIVERSITY OF SÃO PAULO   (Brazil)

^e EPFL   (Switzerland)

^f TEXAS A AND M UNIVERSITY   (United States)

^g GRENOBLE INSTITUTE OF TECHNOLOGY   (France)

Author keywords

Circuit modeling; Integrated circuit design; MOS analog integrated circuits; MOS devices

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; MOSFET DEVICES; TRANSCONDUCTANCE;

ANALOG INTEGRATED CIRCUITS;

SEMICONDUCTOR DEVICE MODELS;

EID: 0032188612     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.720397     Document Type: Article

References (12)

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