Mitigating the effects of process variation in ultra-low voltage chip multiprocessors using dual supply voltages and half-speed units

IEEE Computer Architecture Letters

Volumn 11, Issue 2, 2012, Pages 45-48

  Miller, Timothy N ^a   Thomas, Renji ^a   Teodorescu, Radu ^a  

^a The Ohio State University   (United States)

Author keywords

chip multiprocessors; Energy efficiency; near threshold voltage; process variation

Indexed keywords

CHIP MULTIPROCESSOR; DUAL SUPPLY VOLTAGES; FUNCTIONAL BLOCK; LOW VOLTAGE OPERATION; MANY-CORE; MAXIMUM FREQUENCY; POWER DELIVERY SYSTEMS; PROCESS VARIATION; SUPPLY VOLTAGES; ULTRALOW VOLTAGE;

ELECTRIC POWER TRANSMISSION; THRESHOLD VOLTAGE;

ENERGY EFFICIENCY;

EID: 84860329987     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/L-CA.2011.36     Document Type: Article

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