Reproduction and detection of board-level functional failure

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 31, Issue 4, 2012, Pages 630-643

  Fang, Hongxia ^a,d   Chakrabarty, Krishnendu ^b,d   Wang, Zhiyuan ^c,d   Gu, Xinli ^c,d  

^a CADENCE DESIGN SYSTEMS   (United States)

^b Duke University   (United States)

^c CISCO SYSTEMS   (United States)

^d HUAWEI TECHNOLOGIES   (United States)

Author keywords

Board level; DFT; diagnosis; functional failure; functional scan; state injection

Indexed keywords

AUTOMATIC TEST EQUIPMENT; BOARD-LEVEL; COVERAGE METRICS; DEFECTIVE PARTS; DELAY FAULTS; DFT; DISCRETE FOURIER TRANSFORM (DFT); FUNCTIONAL FAILURE; FUNCTIONAL SCAN; FUNCTIONAL STATE; FUNCTIONAL TEST; INITIAL STATE; LINEAR TIME; NO TROUBLE FOUND; POWER-SUPPLY NOISE; ROOT CAUSE; SCAN TESTS; TEST METHOD;

AUTOMATIC TESTING; DIAGNOSIS; DISCRETE FOURIER TRANSFORMS; INTEGRATED CIRCUIT TESTING;

EXPERIMENTS;

EID: 84859076191     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2011.2175391     Document Type: Conference Paper

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