Physical-defect modeling and optimization for fault-insertion test

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 20, Issue 4, 2012, Pages 723-736

  Zhang, Zhaobo ^a   Wang, Zhanglei ^b   Gu, Xinli ^c   Chakrabarty, Krishnendu ^a  

^a Duke University   (United States)

^b CISCO SYSTEMS   (United States)

^c HUAWEI TECHNOLOGIES CO LTD   (China)

Author keywords

Fault insertion test (FIT); functional test; integer linear programming (ILP) model; physical defects; system reliability test

Indexed keywords

FAULT-INSERTION TEST (FIT); FUNCTIONAL TEST; INTEGER LINEAR PROGRAMMING MODELS; PHYSICAL DEFECTS; SYSTEM RELIABILITY;

DEFECTS; ELECTRIC FAULT CURRENTS; FAULT DETECTION; FAULT TOLERANCE; KNOWLEDGE BASED SYSTEMS; OPTIMIZATION; PROGRAM DIAGNOSTICS; RELIABILITY ANALYSIS;

MODELS;

EID: 84859002167     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2011.2114681     Document Type: Conference Paper

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