A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs

Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11

Volumn , Issue , 2011, Pages 175-184

  Singh, Amit Kumar ^a   Kumar, Akash ^b,c   Srikanthan, Thambipillai ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^c EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

Design time analysis; Multiprocessor; Run time mapping; Synchronous dataflow; Throughput

Indexed keywords

DESIGN-TIME ANALYSIS; HYBRID FLOW; HYBRID STRATEGIES; MODERN EMBEDDED SYSTEMS; MULTIPLE APPLICATIONS; MULTIPROCESSOR; RUN-TIME MAPPING; RUNTIMES; STATIC BEHAVIORS; SYNCHRONOUS DATAFLOW; SYSTEMS ON CHIPS; THROUGHPUT CONSTRAINTS; TRADE-OFF POINT;

DESIGN; MAPPING; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS; THROUGHPUT;

EMBEDDED SYSTEMS;

EID: 81255203528     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2038698.2038726     Document Type: Conference Paper

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