Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS

2011 20th European Conference on Circuit Theory and Design, ECCTD 2011

Volumn , Issue , 2011, Pages 365-368

  Effendrik, Popong ^a   Jiang, Wenlong ^a   Van De Gevel, Marcel ^b   Verwaal, Frank ^b   Staszewski, R Bogdan ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b Catena Radio Design   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALL DIGITAL PHASE LOCKED LOOP; CHARGE-PUMP; CLOCK GATING; CMOS TECHNOLOGY; CORE LAYOUT; EMERGING WIRELESS TECHNOLOGIES; FREQUENCY REFERENCE; HIGH-SPEED; IN-BAND PHASE NOISE; KEY COMPONENT; PACKET DATA; PHASE/FREQUENCY DETECTOR; POWER SUPPLY; PSEUDO DIFFERENTIAL; RF FREQUENCIES; RF TRANSCEIVERS; SILICON AREA; TIME TO DIGITAL CONVERTERS; WIMAX TECHNOLOGY; WORST CASE;

CIRCUIT THEORY; CLOCKS; CMOS INTEGRATED CIRCUITS; DELAY CIRCUITS; FREQUENCY CONVERTERS; FREQUENCY SYNTHESIZERS; MICROPROCESSOR CHIPS; PHASE LOCKED LOOPS; SPACE OPTICS;

WIMAX;

EID: 80155151173     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECCTD.2011.6043362     Document Type: Conference Paper

References (11)

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