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Volumn , Issue , 2011, Pages 279-284
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Design, simulation and process optimization of AuInSn low temperature TLP bonding for 3D IC Stacking
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Author keywords
[No Author keywords available]
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Indexed keywords
BONDING METHODS;
COMPOSITIONAL STRUCTURE;
CROSS-SECTIONAL STRUCTURES;
DAISY CHAIN STRUCTURE;
EDX ANALYSIS;
LOW TEMPERATURE SOLDERS;
LOW TEMPERATURES;
MECHANICAL SIMULATIONS;
PHASE CHANGE;
RELIABILITY TEST;
RESISTANCE INCREASE;
SOLDER MATERIAL;
TEST VEHICLE;
THERMAL CYCLE TESTS;
THREE-LAYER;
TLP BONDING;
OPTIMIZATION;
SHEAR STRENGTH;
SOLDERING ALLOYS;
STRESSES;
THREE DIMENSIONAL;
TEMPERATURE;
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EID: 79960397188
PISSN: 05695503
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ECTC.2011.5898526 Document Type: Conference Paper |
Times cited : (5)
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References (10)
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