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Volumn , Issue , 2011, Pages 279-284

Design, simulation and process optimization of AuInSn low temperature TLP bonding for 3D IC Stacking

Author keywords

[No Author keywords available]

Indexed keywords

BONDING METHODS; COMPOSITIONAL STRUCTURE; CROSS-SECTIONAL STRUCTURES; DAISY CHAIN STRUCTURE; EDX ANALYSIS; LOW TEMPERATURE SOLDERS; LOW TEMPERATURES; MECHANICAL SIMULATIONS; PHASE CHANGE; RELIABILITY TEST; RESISTANCE INCREASE; SOLDER MATERIAL; TEST VEHICLE; THERMAL CYCLE TESTS; THREE-LAYER; TLP BONDING;

EID: 79960397188     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2011.5898526     Document Type: Conference Paper
Times cited : (5)

References (10)
  • 6
    • 58849125006 scopus 로고    scopus 로고
    • The role of ni buffer layer on high yield low temperature hermetic bonding using In/Sn/Cu metallization
    • Da-Quan Yu, et al, "The Role of Ni Buffer Layer on High Yield Low Temperature Hermetic Bonding using In/Sn/Cu Metallization", Appl. Phys. Lett. 94, 034105(2009).
    • (2009) Appl. Phys. Lett. , vol.94 , pp. 034105
    • Yu, D.1
  • 8
    • 24144485173 scopus 로고    scopus 로고
    • Thermal expansion of AuIn2
    • Cheng K. Saw, et al, "Thermal Expansion of AuIn2", Scripta Materiala 53, (2005), 1153-1157.
    • (2005) Scripta Materiala , vol.53 , pp. 1153-1157
    • Saw, C.K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.