The enhanced photoresist shrink process technique toward 22nm node

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7972, Issue , 2011, Pages

  Oyama, Kenichi ^a   Yamauchi, Shohei ^a   Yabe, Kazuo ^a   Hara, Arisa ^a   Natori, Sakurako ^a   Yaegashi, Hidetami ^a  

^a TOKYO ELECTRON LTD   (Japan)

Author keywords

ALD SiO2; ArFi; CH; Hole shrink; LELE; LLE; Pitch shrink; SADP; X LLE; X SADP

Indexed keywords

ALD-SIO2; ARFI; CH; HOLE SHRINK; LELE; LLE; PITCH SHRINK; SADP; X-LLE; X-SADP;

PHOTORESISTS; SILICA; TECHNOLOGY;

SHRINKAGE;

EID: 79955887365     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.878947     Document Type: Conference Paper

References (7)

1. S. Shimura et al., "Advanced resist process enabling implementation of CD controllability for 32 nm and beyond" Proc. of SPIE 6923 - 132 (2008)
2. T. Kawasaki et al., "Fabrication of 32-nm contact/via hole by photolithographic-friendly method" Proc. of SPIE 6932-122 (2008)
3. S. Shimura et al., "Fine trench patterns with double patterning and trench shrink technology" Proc. of SPIE 7272-9 (2009)
4. H. Yaegashi et al., "Important challenges for line-width-roughness reduction" Proc. of SPIE 7273-146 (2009)
5. A. Hara et al., "Advanced self-aligned DP process development for 22-nm node and beyond" Proc. of SPIE 7639-79 (2010)
6. K. Yabe et al., "Novel approaches to controlling photo-resist CD in double patterning process" Proc. of SPIE 7639-80 (2010)
7. K. Oyama et al., "The important challenge to extend spacer DP process towards 22nm and beyond" Proc. of SPIE 7639-6 (2010)