Important challenges for line-width-roughness reduction

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7273, Issue , 2009, Pages

  Yaeagshi, Hidetami ^a   Kushibiki, M ^a   Nishimura, E ^a   Shimura, S ^a   Iwao, F ^a   Kawasaki, T ^a   Hasebe, K ^a   Murakami, H ^a   Hara, A ^a   Yabe, K ^a  

^a TOKYO ELECTRON LTD   (Japan)

Author keywords

22nm; 32nm; Double patterning; Litho Litho Etch; LWR; Overlay; Spacer process

Indexed keywords

22NM; 32NM; DOUBLE PATTERNING; LITHO-LITHO-ETCH; LWR; OVERLAY; SPACER PROCESS;

MASKS; PLASMA ETCHING;

ROUGHNESS MEASUREMENT;

EID: 65849119113     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.814126     Document Type: Conference Paper

References (1)

1. [1] Woo Yung Jung, et. al., "Patterning with spacer for expanding the resolution limit of current lithography tool," Proc. SPIE, 6156-27(2006) (Pubitemid 44021269)