A general algorithm for energy-aware dynamic reconfiguration in multitasking systems

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2011, Pages 334-339

  Wang, Weixun ^a   Ranka, Sanjay ^a   Mishra, Prabhat ^a  

^a University of Florida   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE ENERGY CONSUMPTION; DYNAMIC CACHE; DYNAMIC RE-CONFIGURATION; DYNAMIC VOLTAGE SCALING; ENERGY AWARE; ENERGY OPTIMIZATION; MEMORY REQUIREMENTS; MULTITASKING SYSTEMS; NEAR-OPTIMAL SOLUTIONS; ON DYNAMICS; PARAMETERIZED; RECONFIGURATION OVERHEAD; RUNNING TIME; SOLUTION QUALITY; SYSTEM OPTIMIZATIONS;

ALGORITHMS; DESIGN; DYNAMIC MODELS; ENERGY CONSERVATION; ENERGY UTILIZATION; MULTITASKING; OPTIMIZATION; VOLTAGE STABILIZING CIRCUITS;

EMBEDDED SYSTEMS;

EID: 79952850907     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2011.17     Document Type: Conference Paper

References (26)

1. A. Malik et al., "A low power unified cache architecture providing power and performance flexibility," ISLPED, pp. 241-243, 2000.
2. C. Zhang et al., "A highly configurable cache for low energy embedded systems," ACM TECS, vol. 6, pp. 362-387, 2005.
3. A. Gordon-Ross and F. Vahid, "A self-tuning configurable cache," DAC, pp. 234-237, 2007.
4. W. Wang et al., "SACR: Scheduling-aware cache reconfiguration for real-time embedded systems," VLSI Design, pp. 547-552, 2009.
5. W. Wang and P. Mishra, "Dynamic reconfiguration of two-level caches in soft real-time embedded systems," ISVLSI, pp. 145-150, 2009.
6. W. Wang and P. Mishra, "Leakage-aware energy minimization using dynamic voltage scaling and cache reconfiguration in real-time systems," VLSI Design, pp. 357-362, 2010.
7. Marvell, Marvell StrongARM 1100 processor, www.marvell.com.
8. H. Aydin et al., "Power-aware scheduling for periodic real-time tasks," IEEE TC, vol. 53, no. 5, pp. 584-600, May 2004.
9. D. Shin and J. Kim, "Dynamic voltage scaling of periodic and aperiodic tasks in priority-driven systems," ASP-DAC, pp. 653-658, 2004.
10. X. Zhong and C. Xu, "System-wide energy minimization for real-time tasks: Lower bound and approximation," ICCAD, pp. 516-521, 2006.
11. R. Jejurikar and R. Gupta, "Energy aware non-preemptive scheduling for hard real-time systems," ECRTS, pp. 21-30, 2005.
12. J. Chen et al., "1 + e approximation clock rate assignment for periodic real-time tasks on a voltage-scaling processor," EMSOFT, pp. 247-250, 2005.
13. D. Shin and J. Kim, "Optimizing intratask voltage scheduling using profile and data-flow information," IEEE TCAD, vol. 26, pp. 369-385, 2007.
14. W. Wang and P. Mishra, "PreDVS: Preemptive dynamic voltage scaling for real-time systems using approximation scheme," DAC, pp. 705-710, 2010.
15. W. Wang et al., "Temperature- and energy-constrained scheduling in multitasking systems: A model checking approach," ISLPED, pp. 85-90, 2010.
16. J. Chen and C. Kuo, "Energy-efficient scheduling for real-time systems on dynamic voltage scaling (DVS) platforms," RTCSA, pp. 28-38, 2007.
17. V. Swaminathan and K. Chakrabarty, "Network flow techniques for dynamic voltage scaling in hard real-time systems," IEEE TCAD, vol. 23, no. 10, pp. 1385-1398, Oct. 2004.
18. HP, CACTI, HP Labs, CACTI 5.3, http://www.hpl.hp.com/.
19. S. M. Martin et al., "Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads," ICCAD, pp. 721-725, 2002.
20. C. Lee et al., "Mediabench: A tool for evaluating and synthesizing multimedia and communications systems," Micro, pp. 330-335, 1997.
21. M. Guthaus et al., "Mibench: A free, commercially representative embedded benchmark suite," WWC, pp. 3-14, 2001.
22. EEMBC, EEMBC, The Embedded Microprocessor Benchmark Consortium, http://www.eembc.org/.
23. D. Burger et al., "Evaluating future microprocessors: The simplescalar tool set," University of Wisconsin-Madison, Tech. Rep., 1996.
24. H. Aydin et al., "Dynamic and aggressive scheduling techniques for power-aware real-time systems," RTSS, pp. 95-105, 2001.
25. C. Rusu et al., "Maximizing the system value while satisfying time and energy constraints," RTSS, pp. 246-255, 2002.
26. R. Jejurikar and R. Gupta, "Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems," ISLPED, pp. 78-81, 2004.