SACR: Scheduling-Aware cache reconfiguration for real-time embedded systems

Proceedings: 22nd International Conference on VLSI Design - Held Jointly with 7th International Conference on Embedded Systems

Volumn , Issue , 2009, Pages 547-552

  Wang, Weixun ^a   Mishra, Prabhat ^a   Gordon Ross, Ann ^a  

^a J Crayton Pruitt Family Department of Biomedical Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE HIERARCHIES; DYNAMIC CACHES; DYNAMIC RECONFIGURATION TECHNIQUES; EFFICIENT SYSTEMS; ENERGY CONSUMPTION; REAL-TIME CONSTRAINTS; REAL-TIME EMBEDDED SYSTEMS; REAL-TIME SCHEDULING; REDUCING ENERGY CONSUMPTION; SOFT REAL-TIME SYSTEMS;

DYNAMIC ANALYSIS; DYNAMIC MODELS; EMBEDDED SYSTEMS; INTEGRATED CIRCUITS; SCHEDULING;

REAL TIME SYSTEMS;

EID: 63149113450     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.Design.2009.66     Document Type: Conference Paper

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