-
1
-
-
33748533457
-
Three-dimensional integrated circuits
-
DOI 10.1147/rd.504.0491
-
A. W. Topol, D. C. La Tulipe Jr., and L. Shi, "Three-dimensional integrated circuits," IBM Journal of Research and Development, vol. 50, no. 4/5, pp. 491-506, 2006. (Pubitemid 44364166)
-
(2006)
IBM Journal of Research and Development
, vol.50
, Issue.4-5
, pp. 491-506
-
-
Topol, A.W.1
La Tulipe Jr., D.C.2
Shi, L.3
Frank, D.J.4
Bernstein, K.5
Steen, S.E.6
Kumar, A.7
Singco, G.U.8
Young, A.M.9
Guarini, K.W.10
Ieong, M.11
-
2
-
-
40349090128
-
Die stacking (3D) microarchitecture
-
DOI 10.1109/MICRO.2006.18, 4041869, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-39
-
B. Black, M. Annavaram, N. Brekelbaum, J. DeVale, L. Jiang, G. H. Loh, D. McCaule, P. Morrow, D. W. Nelson, and D. Pantuso, "Die stacking (3D) microarchitecture," in Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006, pp. 469-479. (Pubitemid 351337019)
-
(2006)
Proceedings of the Annual International Symposium on Microarchitecture, MICRO
, pp. 469-479
-
-
Black, B.1
Annavaram, M.2
Brekelbaum, N.3
Devale, J.4
Lei, J.5
Loh, G.H.6
McCauley, D.7
Morrow, P.8
Nelson, D.W.9
Pantuso, D.10
Reed, P.11
Rupley, J.12
Shankar, S.13
John, S.14
Webb, C.15
-
4
-
-
0031097278
-
Rotation scheduling: A loop pipelining algorithm
-
PII S0278007097047404
-
L.-F. Chao, A. LaPaugh, and E. H.-M. Sha, "Rotation scheduling: A loop pipelining algorithm," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 3, pp. 229-239, Mar. 1997. (Pubitemid 127767669)
-
(1997)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol.16
, Issue.3
, pp. 229-239
-
-
Chao, L.-F.1
Lapaugh, A.S.2
Sha, E.H.-M.3
-
5
-
-
85029600625
-
Scheduling for reduced CPU energy
-
M. Weiser, B. Welch, A. Demers, and S. Shenker, "Scheduling for reduced CPU energy," in Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation, 1994.
-
(1994)
Proceedings of the 1st USENIX Conference on Operating Systems Design and Implementation
-
-
Weiser, M.1
Welch, B.2
Demers, A.3
Shenker, S.4
-
6
-
-
0003242692
-
Compiler-assisted dynamic power-aware scheduling for real-time applications
-
D. Mosse, H. Aydin, B. Childers, and R. Melhem, "Compiler-assisted dynamic power-aware scheduling for real-time applications," in Workshop on Compilers and Operating Systems for Low-Power, 2000.
-
(2000)
Workshop on Compilers and Operating Systems for Low-power
-
-
Mosse, D.1
Aydin, H.2
Childers, B.3
Melhem, R.4
-
7
-
-
22144450218
-
Static mapping of subtasks in a heterogeneous ad hoc grid environment
-
S. Shivle, R. Castain, H. J. Siegel, A. A. Maciejewski, T. Banka, K. Chindam, et al., "Static mapping of subtasks in a heterogeneous ad hoc grid environment," in 13th IEEE Heterogeneous Computing Workshop (HCW 2004), 2004.
-
(2004)
13th IEEE Heterogeneous Computing Workshop (HCW 2004)
-
-
Shivle, S.1
Castain, R.2
Siegel, H.J.3
Maciejewski, A.A.4
Banka, T.5
Chindam, K.6
-
8
-
-
33644881932
-
Static allocation of resources to communicating subtasks in a heterogeneous ad hoc grid environment
-
S. Shivle, H. J. Siegel, A. A. Maciejewski, P. Sugavanam, T. Banka, R. Castain, Chindam, et al., "Static allocation of resources to communicating subtasks in a heterogeneous ad hoc grid environment," Journal of Parallel and Distributed Computing, vol. 66, no. 4, pp. 600-611, 2006.
-
(2006)
Journal of Parallel and Distributed Computing
, vol.66
, Issue.4
, pp. 600-611
-
-
Shivle, S.1
Siegel, H.J.2
Maciejewski, A.A.3
Sugavanam, P.4
Banka, T.5
Castain, R.6
Chindam7
-
9
-
-
33750320382
-
Energy-constrained task mapping and scheduling in wireless sensor networks
-
DOI 10.1109/MAHSS.2005.1542802, 1542802, 2nd IEEE International Conference on Mobile Ad-hoc and Sensor Systems, MASS 2005
-
Y. Tian, E. Ekici, and F. Ozguner, "Energy-constrained task mapping and scheduling in wireless sensor networks," in IEEE International Conference on Mobile Adhoc and Sensor Systems Conference, 2005, pp. 211-218. (Pubitemid 44612281)
-
(2005)
2nd IEEE International Conference on Mobile Ad-hoc and Sensor Systems, MASS 2005
, vol.2005
, pp. 211-218
-
-
Tian, Y.1
Ekici, E.2
Ozguner, F.3
-
10
-
-
65849231067
-
Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems
-
M. Qiu and E. H.-M. Sha, "Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems," ACM Transactions on Design Automation of Electronic Systems, vol. 14, no. 2, pp. 1-30, 2009.
-
(2009)
ACM Transactions on Design Automation of Electronic Systems
, vol.14
, Issue.2
, pp. 1-30
-
-
Qiu, M.1
Sha, E.H.-M.2
-
11
-
-
70749141579
-
Rotation scheduling and voltage assignment to minimize energy for SoC
-
M. Qiu, L.T. Yang, Z. Shao, and E. H.-M. Sha, "Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC," in The International Conference on Computational Science and Engineering, 2009, pp. 48-55.
-
(2009)
The International Conference on Computational Science and Engineering
, pp. 48-55
-
-
Qiu, M.1
Yang, L.T.2
Shao, Z.3
Sha, E.H.-M.4
-
12
-
-
50249181803
-
Thermal-aware steiner routing for 3D stacked ICs
-
M. Pathak and S Lim, "Thermal-aware steiner routing for 3D stacked ICs," in ACM/IEEE ICCAD, 2008, pp. 205-211.
-
(2008)
ACM/IEEE ICCAD
, pp. 205-211
-
-
Pathak, M.1
Lim, S.2
-
13
-
-
50249153041
-
3D-STAF: Scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits
-
P. Zhou, Y. Ma, Z. Li, R. P. Dick, L. Shang, H. Zhou, X. Hong, and Q. Zhou, "3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits," in ACM/IEEE ICCAD, 2008, pp. 590-597.
-
(2008)
ACM/IEEE ICCAD
, pp. 590-597
-
-
Zhou, P.1
Ma, Y.2
Li, Z.3
Dick, R.P.4
Shang, L.5
Zhou, H.6
Hong, X.7
Zhou, Q.8
-
14
-
-
79951782855
-
Thermalscope: Multi-scale thermal analysis for nanometer-scale integrated circuits
-
N. Allec, Z. Hassan, L. Shang, R. P. Dick, and R. Yang, "Thermalscope: Multi-scale thermal analysis for nanometer-scale integrated circuits," in ACM/IEEE ICCAD, 2008, pp. 75-82.
-
(2008)
ACM/IEEE ICCAD
, pp. 75-82
-
-
Allec, N.1
Hassan, Z.2
Shang, L.3
Dick, R.P.4
Yang, R.5
-
16
-
-
70350055176
-
Dynamic thermal management in 3D multicore architectures
-
A. K. Coskun, J. L. Ayala, D. Atienza, T. S. Rosing, and Y. Leblebici, "Dynamic thermal management in 3D multicore architectures," in ACM/IEEE DATE, 2009, pp. 1410-1415.
-
(2009)
ACM/IEEE DATE
, pp. 1410-1415
-
-
Coskun, A.K.1
Ayala, J.L.2
Atienza, D.3
Rosing, T.S.4
Leblebici, Y.5
-
17
-
-
70449713877
-
Predict and act: Dynamic thermal management for multi-core processors
-
San Fancisco, CA, USA
-
R. Ayoub and T. S. Rosing, "Predict and act: dynamic thermal management for multi-core processors," in Proc. ACM ISLPED, San Fancisco, CA, USA, 2009, pp. 99-104.
-
(2009)
Proc. ACM ISLPED
, pp. 99-104
-
-
Ayoub, R.1
Rosing, T.S.2
-
18
-
-
47849132667
-
Three-dimensional chip-multiprocessor run-time thermal management
-
Aug.
-
C. Zhu, Z. Gu, L. Shang, R. P. Dick, and R. Joseph, "Three- dimensional chip-multiprocessor run-time thermal management," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 8, pp. 1479-1492, Aug. 2008.
-
(2008)
IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems
, vol.27
, Issue.8
, pp. 1479-1492
-
-
Zhu, C.1
Gu, Z.2
Shang, L.3
Dick, R.P.4
Joseph, R.5
-
19
-
-
72649091934
-
Thermal-aware task scheduling for 3D multicore processors
-
Jan.
-
X. Zhou, J. Yang, Y. Xu, Y. Zhang, and J. Zhao, "Thermal-aware task scheduling for 3D multicore processors," IEEE TPDS, vol. 21, no. 1, pp. 60-70, Jan. 2010.
-
(2010)
IEEE TPDS
, vol.21
, Issue.1
, pp. 60-70
-
-
Zhou, X.1
Yang, J.2
Xu, Y.3
Zhang, Y.4
Zhao, J.5
-
20
-
-
84884876066
-
Thermal-aware scheduling for peak temperature reduction with stochastic workloads
-
Stockholm, Sweden, Apr.
-
S. Liu and M. Qiu, "Thermal-aware scheduling for peak temperature reduction with stochastic workloads," in IEEE/ACM RTAS, Stockholm, Sweden, Apr. 2010.
-
(2010)
IEEE/ACM RTAS
-
-
Liu, S.1
Qiu, M.2
-
21
-
-
0000769475
-
Heuristic algorithms for scheduling independent tasks on nonidentical processors
-
Oscar H. Ibarra and Chul E. Kim, "Heuristic Algorithms for Scheduling Independent Tasks on Nonidentical Processors," Journal of the ACM, vol. 24, no. 2, pp. 280-289, 1977.
-
(1977)
Journal of the ACM
, vol.24
, Issue.2
, pp. 280-289
-
-
Ibarra, O.H.1
Kim, C.E.2
-
22
-
-
0033719421
-
Wattch: A framework for architectural-level power analysis and optimizations
-
D. Brooks, V. Tiwari, and M. Martonosi, "Wattch: a framework for architectural-level power analysis and optimizations," in IEEE ISCA, 2000, pp. 83-94.
-
(2000)
IEEE ISCA
, pp. 83-94
-
-
Brooks, D.1
Tiwari, V.2
Martonosi, M.3
-
23
-
-
85009352442
-
Temperature-aware microarchitecture: Modeling and implementation
-
Mar.
-
K. Skadron, M. Stan, K. Sankaranarayanan, W. Huang, S. Velusamy, and D. Tarjan, "Temperature-aware microarchitecture: Modeling and implementation," ACM TACO, vol. 1, no. 1, pp. 94-125, Mar. 2004.
-
(2004)
ACM TACO
, vol.1
, Issue.1
, pp. 94-125
-
-
Skadron, K.1
Stan, M.2
Sankaranarayanan, K.3
Huang, W.4
Velusamy, S.5
Tarjan, D.6
-
24
-
-
0032639289
-
The alpha 21264 microprocessor
-
Mar./Apr.
-
R. E. Kessler, "The Alpha 21264 microprocessor," IEEE Micro, vol. 19, no. 2, pp. 24-36, Mar./Apr. 1999.
-
(1999)
IEEE Micro
, vol.19
, Issue.2
, pp. 24-36
-
-
Kessler, R.E.1
|