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A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter
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Den Bosch, A.V.1
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3
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28144435050
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A 12 b 500 MS/s DAC with >70 dB SFDR up to 120 MHz in 0.18 mum CMOS
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Feb
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K. Doris, J. Briaire, D. Leenaerts, M. Vertregt, and A. van Roermund, "A 12 b 500 MS/s DAC with >70 dB SFDR up to 120 MHz in 0.18 mum CMOS", in Proc. IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2005, pp. 116-588.
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Doris, K.1
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4
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57049151915
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A 130 nm CMOS 6-bit full Nyquist 3 GS/s DAC
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Nov
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X. Wu, P. Palmers, and M. S. J. Steyaert, "A 130 nm CMOS 6-bit full Nyquist 3 GS/s DAC", IEEE J. Solid-State Circuits, vol. 43, no. 11, pp. 2396-2403, Nov. 2008.
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Wu, X.1
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72949118715
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A 12 bit 2.9 GS/s DAC with IM3 < -60 dBc beyond 1 GHz in 65 nm CMOS
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Dec
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C.-H. Lin, F. M. L. van der Goes, J. R. Westra, J. Mulder, Y. Lin, E. Arslan, E. Ayranci, X. Liu, and K. Bult, "A 12 bit 2.9 GS/s DAC with IM3 < -60 dBc beyond 1 GHz in 65 nm CMOS", IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3285-3293, Dec. 2009.
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6
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0033281056
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A 14-b, 100-MS/s CMOS DAC designed for spectral performance
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Dec
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A. R. Bugeja, B.-S. Song, P. L. Rakers, and S. F. Gillig, "A 14-b, 100-MS/s CMOS DAC designed for spectral performance", IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1719-1732, Dec. 1999.
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7
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31444447742
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The analysis and improvement of a currentsteering DACs dynamic SFDR-I: The cell-dependent delay differences
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Jan
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T. Chen and G. G. E. Gielen, "The analysis and improvement of a currentsteering DACs dynamic SFDR-I: The cell-dependent delay differences", IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 1, pp. 3-15, Jan. 2006.
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Chen, T.1
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A self-trimming 14-b 100-MS/s CMOS DAC
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Dec
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A. R. Bugeja and B.-S. Song, "A self-trimming 14-b 100-MS/s CMOS DAC", IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1841-1852, Dec. 2000.
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A 200 MS/s 14 b 97 mW DAC in 0.18 mum CMOS
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Q. Huang, P. A. Francese, C. Martelli, and J. Nielsen, "A 200 MS/s 14 b 97 mW DAC in 0.18 mum CMOS", in Proc. IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2004, pp. 364-532.
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Huang, Q.1
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10
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0036772591
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A digital-to-analog converter based on differential-quad switching
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Oct
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S. Park, G. Kim, S.-C. Park, and W. Kim, "A digital-to-analog converter based on differential-quad switching", IEEE J. Solid-State Circuits, vol. 37, no. 10, pp. 1335-1338, Oct. 2002.
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Park, S.1
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11
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52249122001
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Dynamic element matching to prevent nonlinear distortion from pulse-shape mismatches in high-resolution DACs
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Sep
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K. L. Chan, J. Zhu, and I. Galton, "Dynamic element matching to prevent nonlinear distortion from pulse-shape mismatches in high-resolution DACs", IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 2607-2078, Sep. 2008.
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Chan, K.L.1
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12
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0002432030
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SFDR-bandwidth limitations for high-speed high-resolution current-steering CMOS D/A converters
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A. V. den Bosch, M. Steyaert, and W. Sansen, "SFDR-bandwidth limitations for high-speed high-resolution current-steering CMOS D/A converters", in Proc. IEEE ICECS, Sep. 1999, pp. 1193-1196.
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