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Volumn , Issue , 2010, Pages 657-662

Unified analytical global placement for large-scale mixed-size circuit designs

Author keywords

[No Author keywords available]

Indexed keywords

AUTHENTICATION; COMPUTER AIDED DESIGN; CONTRACTS; INTEGRATED CIRCUIT MANUFACTURE; MATHEMATICAL PROGRAMMING; ROTATION; TIMING CIRCUITS;

EID: 78650921590     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2010.5654240     Document Type: Conference Paper
Times cited : (10)

References (14)
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  • 5
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    • H.-C. Chen, Y.-L. Chunag, Y.-W. Chang, and Y.-C. Chang. Constraint graph-based macro placement for modern mixed-size circuit designs. In Proc. of ICCAD, pages 218-223, 2008.
    • (2008) Proc. of ICCAD , pp. 218-223
    • Chen, H.-C.1    Chunag, Y.-L.2    Chang, Y.-W.3    Chang, Y.-C.4
  • 6
    • 45849140142 scopus 로고    scopus 로고
    • NTUplace3: An analytical placer for large-scale mixed-size designs with preplaced blocks and density constraints
    • July
    • T.-C. Chen, Z.-W. Jiang, T.-C. Hsu, H.-C. Chen, and Y.-W. Chang. NTUplace3: An analytical placer for large-scale mixed-size designs with preplaced blocks and density constraints. IEEE Trans, on CAD, 27(7): 1228-1240, July 2008.
    • (2008) IEEE Trans, on CAD , vol.27 , Issue.7 , pp. 1228-1240
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  • 7
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    • MP-trees: A packing-based macro placement algorithm for modern mixed-size designs
    • September
    • T.-C. Chen, P.-H. Yuh, Y.-W. Chang, F.-J. Huang, and D. Liu. MP-trees: A packing-based macro placement algorithm for modern mixed-size designs. IEEE Trans. on CAD, 27(9), September 2008.
    • (2008) IEEE Trans. on CAD , vol.27 , pp. 9
    • Chen, T.-C.1    Yuh, P.-H.2    Chang, Y.-W.3    Huang, F.-J.4    Liu, D.5
  • 8
    • 16244391451 scopus 로고    scopus 로고
    • An analytic placer for mixed-size placement and timing-driven placement
    • A. B. Kahng and Q. Wang. An analytic placer for mixed-size placement and timing-driven placement. In Proc. of ICCAD, pages 565-572, 2004.
    • (2004) Proc. of ICCAD , pp. 565-572
    • Kahng, A.B.1    Wang, Q.2
  • 9
    • 18744393753 scopus 로고    scopus 로고
    • Implementation and extensibility of an analytic placer
    • May
    • A. B. Kahng and Q. Wang. Implementation and extensibility of an analytic placer. IEEE Trans. on CAD, 24(5), May 2005.
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  • 10
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  • 11
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    • US patent 6, 301, 693: Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer
    • W. C. Naylor, R. Donelly, and L. Sha. US patent 6, 301, 693: Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer. 2001.
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  • 13
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.