Multi-threshold voltage FinFET sequential circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 19, Issue 1, 2011, Pages 151-156

  Tawfik, Sherif A ^a   Kursun, Volkan ^b  

^a University of Wisconsin Madison   (United States)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

Gate drain source overlap engineering; independent gate bias; multi threshold voltage; work function engineering

Indexed keywords

ACTIVE MODE; ENGINEERING TECHNIQUES; FINFETS; GATE BIAS; GATE-DRAIN/SOURCE OVERLAP ENGINEERING; LEAKAGE POWER; MULTITHRESHOLD; POWER CONSUMPTION;

ENGINEERING; INTEGRATED CIRCUITS; SEQUENTIAL CIRCUITS; THRESHOLD VOLTAGE;

BIAS VOLTAGE;

EID: 78650881173     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2009.2028028     Document Type: Article

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