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Applied Physics Letters

Volumn 97, Issue 22, 2010, Pages

Dual dielectric tunnel barrier in silicon-rich silicon nitride charge-trap nonvolatile memory

(5) Kim, Eunkyeom a Yim, Taekyung a,c An, Seungman a,c Cho, Won Ju b Park, Kyoungwan a

a University of Seoul (South Korea)

b Kwangwoon University (South Korea)

c SAMSUNG Electronics (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ASYMMETRIC TUNNELS; CHARGE RETENTION CHARACTERISTIC; CHARGE TRAP; DIELECTRIC LAYER; FOWLER-NORDHEIM TUNNELING; FRENKEL-POOLE EMISSION; LAYER THICKNESS; MEMORY WINDOW; NON-VOLATILE MEMORIES; PROGRAM/ERASE; RETENTION TIME; STRESS VOLTAGES; THICKNESS RATIO; THRESHOLD VOLTAGE SHIFTS; TIME DURATION; TUNNEL BARRIER; TUNNELING CURRENT;

SILICON NITRIDE; THRESHOLD VOLTAGE;

SILICON OXIDES;

EID: 78650654053 PISSN: 00036951 EISSN: None Source Type: Journal
DOI: 10.1063/1.3521260 Document Type: Article

Times cited : (10)

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