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Volumn 6, Issue 4, 2010, Pages

Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs

Author keywords

Fredkin gate; Reversible logic; Sequential circuits

Indexed keywords

D-LATCH; EMERGING TECHNOLOGIES; FREDKIN GATE; GARBAGE OUTPUT; MASTER-SLAVE; MASTER-SLAVE FLIP-FLOP; NOVEL DESIGN; NOVEL STRATEGIES; OPTICAL COMPUTING; OPTIMIZED DESIGNS; PRIMARY DESIGN; QUANTUM COMPUTING; QUANTUM COSTS; QUANTUM DOT CELLULAR AUTOMATA; REVERSIBLE GATES; REVERSIBLE LOGIC; SEQUENTIAL DESIGN; SIMULATION RESULT; SPECIAL PROPERTIES; ULTRA LOW POWER; VERILOG HDL;

EID: 78650651664     PISSN: 15504832     EISSN: 15504840     Source Type: Journal    
DOI: 10.1145/1877745.1877748     Document Type: Article
Times cited : (185)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.