Efficient adder circuits based on a conservative reversible logic gate

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

Volumn 2002-January, Issue , 2002, Pages 83-88

  Bruce, J W ^a   Thornton, M A ^a   Shivakumaraiah, L ^a   Kokate, P S ^a   Li, X ^a  

^a MISSISSIPPI STATE UNIVERSITY   (United States)

Author keywords

Adders; Circuit topology; Computer architecture; Delay; Hardware; Logic circuits; Logic gates; Optical computing; Quantum computing; Signal generators

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DELAY CIRCUITS; ELECTRIC NETWORK TOPOLOGY; HARDWARE; LOGIC CIRCUITS; LOGIC GATES; OPTICAL DATA PROCESSING; QUANTUM COMPUTERS; SIGNAL GENERATORS; TOPOLOGY; VLSI CIRCUITS;

CARRY SKIP ADDERS; COMPUTING PARADIGM; DELAY; HARDWARE COMPLEXITY; QUANTUM COMPUTING; REVERSIBLE LOGIC GATES; RIPPLE CARRY ADDERS; THEORETICAL PERFORMANCE;

ADDERS;

EID: 70350767761     PISSN: 21593469     EISSN: 21593477     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2002.1016879     Document Type: Conference Paper

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