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Volumn , Issue , 2010, Pages

A timing error detection latch using subthreshold source-coupled logic

Author keywords

[No Author keywords available]

Indexed keywords

CMOS LOGIC; DELAY PERFORMANCE; LOGIC STYLE; SUBTHRESHOLD; SUBTHRESHOLD REGION; SUBTHRESHOLD SOURCE-COUPLED LOGIC; TIMING ERROR DETECTION; TIMING ERRORS; ULTRALOW POWER APPLICATION;

EID: 78049495445     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (12)
  • 3
    • 77952231026 scopus 로고    scopus 로고
    • A power-efficient 32b arm isa processor using timing-error detection and correction for transient-error tolerance and adaptation to pvt variations
    • D. Bull, S. Das, K. Shivshankar, G. Dasika, K. Flautner, and D. Blaauw, "A power-efficient 32b arm isa processor using timing-error detection and correction for transient-error tolerance and adaptation to pvt variations," ISSCC, 2010.
    • ISSCC, 2010
    • Bull, D.1    Das, S.2    Shivshankar, K.3    Dasika, G.4    Flautner, K.5    Blaauw, D.6
  • 5
    • 46749108096 scopus 로고    scopus 로고
    • Subthreshold source-coupled logic circuits for ultra-low-power applications
    • A. Tajalli, E. J. Brauer, Y. Leblebici, and E. Vittoz, "Subthreshold source-coupled logic circuits for ultra-low-power applications," IEEE J. Solid-State Circuits, vol. 43, no. 7, pp. 1699-1710, 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , Issue.7 , pp. 1699-1710
    • Tajalli, A.1    Brauer, E.J.2    Leblebici, Y.3    Vittoz, E.4
  • 6
    • 69449100233 scopus 로고    scopus 로고
    • Nanopower subthreshold mcml in submicrometer cmos technology
    • F. Cannillo, C. Toumazou, and T. S. Lande, "Nanopower subthreshold mcml in submicrometer cmos technology," IEEE Trans. Circuits Syst. I, vol. 56, no. 8, pp. 1598-1611, 2009.
    • (2009) IEEE Trans. Circuits Syst. I , vol.56 , Issue.8 , pp. 1598-1611
    • Cannillo, F.1    Toumazou, C.2    Lande, T.S.3
  • 7
    • 77949573723 scopus 로고    scopus 로고
    • Measurement of a timing error detection latch capable of sub-threshold operation
    • M. Turnquist and L. Koskinen, "Measurement of a timing error detection latch capable of sub-threshold operation," NORCHIP, 2009.
    • (2009) NORCHIP
    • Turnquist, M.1    Koskinen, L.2
  • 11
    • 67349188103 scopus 로고    scopus 로고
    • Leakage current reduction using subthreshold source-coupled logic
    • A. Tajalli and Y. Leblebici, "Leakage current reduction using subthreshold source-coupled logic," IEEE Trans. Circuits Syst. II, vol. 56, no. 5, pp. 374-378, 2009.
    • (2009) IEEE Trans. Circuits Syst. II , vol.56 , Issue.5 , pp. 374-378
    • Tajalli, A.1    Leblebici, Y.2
  • 12
    • 72849147344 scopus 로고    scopus 로고
    • Subthreshold scl for ultra-low-power sram and low-activity-rate digital systems
    • -, "Subthreshold scl for ultra-low-power sram and low-activity-rate digital systems," ESSIRC, pp. 164-167, 2009.
    • (2009) ESSIRC , pp. 164-167
    • Tajalli, A.1    Leblebici, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.