-
1
-
-
0036923304
-
I-MOS: A novel semiconductor device with a subthreshold slope lower than kT/q
-
K. Gopalakrishnan, P. B. Griffin, and J. D. Plummer, "I-MOS: A novel semiconductor device with a subthreshold slope lower than kT/q," in IEDM Tech. Dig., 2002, pp. 289-292.
-
(2002)
IEDM Tech. Dig.
, pp. 289-292
-
-
Gopalakrishnan, K.1
Griffin, P.B.2
Plummer, J.D.3
-
2
-
-
12344320429
-
Impact ionization MOS (I-MOS)\-Part I: Device and circuit simulations
-
Jan.
-
K. Gopalakrishnan, P. B. Griffin, and J. D. Plummer, "Impact ionization MOS (I-MOS)\-Part I: Device and circuit simulations," IEEE Trans. Electron Devices, vol. 52, no. 1, pp. 69-76, Jan. 2005.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.1
, pp. 69-76
-
-
Gopalakrishnan, K.1
Griffin, P.B.2
Plummer, J.D.3
-
3
-
-
12344288472
-
Impact ionization MOS (I-MOS) - Part II : Experimental results
-
DOI 10.1109/TED.2004.841345
-
K. Gopalakrishnan, R. Woo, C. Jungemann, P. B. Griffin, and J. D. Plummer, "Impact ionization MOS (I-MOS)\-Part II: Experimental results," IEEE Trans. Electron Devices, vol. 52, no. 1, pp. 77-84, Jan. 2005. (Pubitemid 40118914)
-
(2005)
IEEE Transactions on Electron Devices
, vol.52
, Issue.1
, pp. 77-84
-
-
Gopalakrishnan, K.1
Woo, R.2
Jungemann, C.3
Griffin, P.B.4
Plummer, J.D.5
-
4
-
-
34047272298
-
Comparative study of the fabricated and simulated impact ionization MOS (IMOS)
-
Apr.
-
F. Mayer, C. Le Royer, G. Le Carval, C. Tabone, L. Clavelier, and S. Deleonibus, "Comparative study of the fabricated and simulated impact ionization MOS (IMOS)," Solid State Electron., vol. 51, no. 4, pp. 579-584, Apr. 2007.
-
(2007)
Solid State Electron.
, vol.51
, Issue.4
, pp. 579-584
-
-
Mayer, F.1
Le Royer, C.2
Le Carval, G.3
Tabone, C.4
Clavelier, L.5
Deleonibus, S.6
-
5
-
-
33746589939
-
Static and dynamic TCAD analysis of IMOS performance: From the single device to the circuit
-
Aug.
-
F. Mayer, C. L. Royer, G. L. Carval, L. Clavelier, and S. Deleonibus, "Static and dynamic TCAD analysis of IMOS performance: From the single device to the circuit," IEEE Trans. Electron Devices, vol. 53, no. 8, pp. 1852-1857, Aug. 2006.
-
(2006)
IEEE Trans. Electron Devices
, vol.53
, Issue.8
, pp. 1852-1857
-
-
Mayer, F.1
Royer, C.L.2
Carval, G.L.3
Clavelier, L.4
Deleonibus, S.5
-
6
-
-
20244390621
-
A novel biasing scheme for I-MOS (Impact-Ionization MOS) devices
-
May
-
W. Y. Choi, J. Y. Song, J. D. Lee, Y. J. Park, and B.-G. Park, "A novel biasing scheme for I-MOS (Impact-Ionization MOS) devices," IEEE Trans. Nanotechnol., vol. 4, no. 3, pp. 322-325, May 2005.
-
(2005)
IEEE Trans. Nanotechnol.
, vol.4
, Issue.3
, pp. 322-325
-
-
Choi, W.Y.1
Song, J.Y.2
Lee, J.D.3
Park, Y.J.4
Park, B.-G.5
-
7
-
-
17644400518
-
100-nm n-/p-channel I-MOS using a novel self-aligned structure
-
Apr.
-
W. Y. Choi, J. Y. Song, J. D. Lee, Y. J. Park, and B.-G. Park, "100-nm n-/p-channel I-MOS using a novel self-aligned structure," IEEE Electron Device Lett., vol. 26, no. 4, pp. 261-263, Apr. 2005.
-
(2005)
IEEE Electron Device Lett.
, vol.26
, Issue.4
, pp. 261-263
-
-
Choi, W.Y.1
Song, J.Y.2
Lee, J.D.3
Park, Y.J.4
Park, B.-G.5
-
8
-
-
33847753444
-
70-nm impact-ionization metal-oxide-semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs)
-
W. Y. Choi, J. Y. Song, J. D. Lee, Y. J. Park, and B.-G. Park, "70-nm impact-ionization metal-oxide-semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs)," in IEDM Tech. Dig., 2005, pp. 955-958.
-
(2005)
IEDM Tech. Dig.
, pp. 955-958
-
-
Choi, W.Y.1
Song, J.Y.2
Lee, J.D.3
Park, Y.J.4
Park, B.-G.5
-
9
-
-
33847749331
-
A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistor
-
E.-H. Toh, G. H. Wang, G.-Q. Lo, N. Balasubramanian, C.-H. Tung, F. Benistant, L. Chan, G. Samudra, and Y.-C. Yeo, "A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistor," in IEDM Tech. Dig., 2005, pp. 951-954.
-
(2005)
IEDM Tech. Dig.
, pp. 951-954
-
-
Toh, E.-H.1
Wang, G.H.2
Lo, G.-Q.3
Balasubramanian, N.4
Tung, C.-H.5
Benistant, F.6
Chan, L.7
Samudra, G.8
Yeo, Y.-C.9
-
10
-
-
33947271798
-
I-MOS transistor with an elevated silicon-germanium impact-ionization region for bandgap engineering
-
Dec.
-
E.-H. Toh, G. H. Wang, L. Chan, G.-Q. Lo, G. Samudra, and Y.-C. Yeo, "I-MOS transistor with an elevated silicon-germanium impact-ionization region for bandgap engineering," IEEE Electron Device Lett., vol. 27, no. 12, pp. 975-977, Dec. 2006.
-
(2006)
IEEE Electron Device Lett.
, vol.27
, Issue.12
, pp. 975-977
-
-
Toh, E.-H.1
Wang, G.H.2
Chan, L.3
Lo, G.-Q.4
Samudra, G.5
Yeo, Y.-C.6
-
11
-
-
58149494115
-
A novel depletion-IMOS (DIMOS) device with improved reliability and reduced operating voltage
-
Jan.
-
C. Onal, R. Woo, H.-Y. S. Koh, P. B. Griffin, and J. D. Plummer, "A novel depletion-IMOS (DIMOS) device with improved reliability and reduced operating voltage," IEEE Electron Device Lett., vol. 30, no. 1, pp. 64-67, Jan. 2009.
-
(2009)
IEEE Electron Device Lett.
, vol.30
, Issue.1
, pp. 64-67
-
-
Onal, C.1
Woo, R.2
Koh, H.-Y.S.3
Griffin, P.B.4
Plummer, J.D.5
-
12
-
-
39549096003
-
A double-spacer I-MOS transistor with shallow source junction and lightly doped drain for reduced operating voltage and enhanced device performance
-
Feb.
-
E.-H. Toh, G. H. Wang, L. Chan, G. Samudra, and Y.-C. Yeo, "A double-spacer I-MOS transistor with shallow source junction and lightly doped drain for reduced operating voltage and enhanced device performance," IEEE Electron Device Lett., vol. 29, no. 2, pp. 189-191, Feb. 2008.
-
(2008)
IEEE Electron Device Lett.
, vol.29
, Issue.2
, pp. 189-191
-
-
Toh, E.-H.1
Wang, G.H.2
Chan, L.3
Samudra, G.4
Yeo, Y.-C.5
-
13
-
-
49049099801
-
y source, and sub-5 mV/decade subthreshold swing
-
y source, and sub-5 mV/decade subthreshold swing," in Proc. Int. Symp. VLSI Technol., Syst. Appl., 2008, pp. 24-25.
-
(2008)
Proc. Int. Symp. VLSI Technol., Syst. Appl.
, pp. 24-25
-
-
Toh, E.-H.1
Wang, G.H.2
Weekst, D.3
Zhu, M.4
Bauert, M.5
Speart, J.6
Chan, L.7
Thomast, S.G.8
Samudra, G.9
Yeo, Y.-C.10
-
14
-
-
50249112606
-
Breakdown voltage reduction in I-MOS devices
-
W. Y. Choi, J. Y. Song, J. P. Kim, S. W. Kim, J. D. Lee, and B.-G. Park, "Breakdown voltage reduction in I-MOS devices," in Proc. Nanotechnol. Device Mater. Conf., 2006, pp. 380-381.
-
(2006)
Proc. Nanotechnol. Device Mater. Conf.
, pp. 380-381
-
-
Choi, W.Y.1
Song, J.Y.2
Kim, J.P.3
Kim, S.W.4
Lee, J.D.5
Park, B.-G.6
-
15
-
-
37249003322
-
Simulation and design of a germanium L-shaped impact-ionization MOS transistor
-
Jan.
-
E.-H. Toh, G. H. Wang, L. Chan, G. Samudra, and Y.-C. Yeo, "Simulation and design of a germanium L-shaped impact-ionization MOS transistor," Semicond. Sci. Technol., vol. 23, no. 1, p. 015 012, Jan. 2008.
-
(2008)
Semicond. Sci. Technol.
, vol.23
, Issue.1
, pp. 015012
-
-
Toh, E.-H.1
Wang, G.H.2
Chan, L.3
Samudra, G.4
Yeo, Y.-C.5
-
16
-
-
33846026760
-
Improved reliability by reduction of hot-electron damage in the vertical impact-ionization MOSFET (I-MOS)
-
Jan.
-
U. Abelein, M. Born, K. K. Bhuwalka, M. Schindler, M. Schlosser, T. Sulima, and I. Eisele, "Improved reliability by reduction of hot-electron damage in the vertical impact-ionization MOSFET (I-MOS)," IEEE Electron Device Lett., vol. 28, no. 1, pp. 65-67, Jan. 2007.
-
(2007)
IEEE Electron Device Lett.
, vol.28
, Issue.1
, pp. 65-67
-
-
Abelein, U.1
Born, M.2
Bhuwalka, K.K.3
Schindler, M.4
Schlosser, M.5
Sulima, T.6
Eisele, I.7
-
17
-
-
46049119460
-
High current drive in ultra-short impact ionization MOS (I-MOS) devices
-
C. Charbuillet, S. Monfray, E. Dubois, P. Bouillon, F. Judong, and T. Skotnicki, "High current drive in ultra-short impact ionization MOS (I-MOS) devices," in IEDM Tech. Dig., 2006, pp. 1-4.
-
(2006)
IEDM Tech. Dig.
, pp. 1-4
-
-
Charbuillet, C.1
Monfray, S.2
Dubois, E.3
Bouillon, P.4
Judong, F.5
Skotnicki, T.6
-
18
-
-
50249171228
-
On the performance limit of impact-ionization transistors
-
C. Shen, J.-Q. Lin, E.-H. Toh, P. Changt, C.-H. Bait, G. S. Heng, and Y.-C. Samudra, "On the performance limit of impact-ionization transistors," in IEDM Tech. Dig., 2007, pp. 117-120.
-
(2007)
IEDM Tech. Dig.
, pp. 117-120
-
-
Shen, C.1
Lin, J.-Q.2
Toh, E.-H.3
Changt, P.4
Bait, C.-H.5
Heng, G.S.6
Samudra, Y.-C.7
-
19
-
-
34248361121
-
0.8OI) by condensation of SiGe/Si superlattice grown on silicon on insulator
-
May
-
0.8OI) by condensation of SiGe/Si superlattice grown on silicon on insulator," Appl. Phys. Lett., vol. 90, no. 19, p. 192 113, May 2007.
-
(2007)
Appl. Phys. Lett.
, vol.90
, Issue.19
, pp. 192113
-
-
Balakumar, S.1
Peng, S.2
Hoe, K.M.3
Lo, G.Q.4
Kumar, R.5
Balasubramanian, N.6
Kwong, D.L.7
Foo, Y.L.8
Tripathy, S.9
-
21
-
-
0029274506
-
Non-local aspects of breakdown in pin diodes
-
Mar.
-
S. Millidge, D. C. Herbert, M. Kane, G. W. Smith, and D. R. Wight, "Non-local aspects of breakdown in pin diodes," Semicond. Sci. Technol., vol. 10, no. 3, pp. 344-347, Mar. 1995.
-
(1995)
Semicond. Sci. Technol.
, vol.10
, Issue.3
, pp. 344-347
-
-
Millidge, S.1
Herbert, D.C.2
Kane, M.3
Smith, G.W.4
Wight, D.R.5
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