Synthesizing multiplier in reversible logic

Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010

Volumn , Issue , 2010, Pages 335-340

  Offermann, Sebastian ^a   Wille, Robert ^a   Dueck, Gerhard W ^b   Drechsler, Rolf ^a  

^a UNIVERSITY OF BREMEN   (Germany)

^b UNIVERSITY OF NEW BRUNSWICK   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT LINE; FAN-OUT; GENERAL PURPOSE; LOW-POWER DESIGN; MULTIPLIER CIRCUITS; QUANTUM COMPUTATION; RESEARCH TOPICS; REVERSIBLE LOGIC; SYNTHESIS METHOD;

COMPUTATIONAL LINGUISTICS; DESIGN; FREQUENCY MULTIPLYING CIRCUITS; LOGIC GATES; QUANTUM COMPUTERS;

LOGIC CIRCUITS;

EID: 77954910413     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DDECS.2010.5491757     Document Type: Conference Paper

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