DARTS: Techniques and tools for predictably fast memory using integrated data allocation and real-time task scheduling

Real-Time Technology and Applications - Proceedings

Volumn , Issue , 2010, Pages 333-342

  Kang, Sangyeol ^a   Dean, Alexander G ^a  

^a North Carolina State University   (United States)

Author keywords

Memory reallocation; Preemption threshold scheduling; Scratchpad memory

Indexed keywords

CODE RUNNING; EXECUTION TIME; EXPERIMENTAL APPROACHES; FAST MEMORY; HARD REAL-TIME; INTEGRATED DATA; MEMORY BANKS; MEMORY REALLOCATION; MEMORY SYSTEMS; MEMORY UNITS; MULTITASKING ENVIRONMENTS; MULTITHREADED; PERFORMANCE ENHANCEMENTS; PERFORMANCE IMPROVEMENTS; PREEMPTION THRESHOLDS; REAL-TIME SYSTEM DESIGNS; REAL-TIME TASKS; RUNTIMES; SCRATCH PAD MEMORY; TASK EXECUTIONS; TASK-SCHEDULING;

EMBEDDED SYSTEMS; MULTIPROCESSING SYSTEMS; MULTITASKING; SCHEDULING; SCHEDULING ALGORITHMS; STATIC RANDOM ACCESS STORAGE; TIME MEASUREMENT;

REAL TIME SYSTEMS;

EID: 77953856974     PISSN: 10801812     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTAS.2010.36     Document Type: Conference Paper

References (32)

1. C. Healy, R. Arnold, F. Mueller, D. Whalley, and M. Harmon, "Bounding pipeline and instruction cache performance," Computers, IEEE Transactions on, vol. 48, no. 1, pp. 53-70, Jan 1999.
2. I. Puaut and D. Decotigny, "Low-complexity algorithms for static cache locking in multitasking hard real-time systems," in Real-Time Systems Symposium, 2002. RTSS 2002. 23rd IEEE, 2002, pp. 114-123.
3. Y. Tan and V. Mooney, "Timing analysis for preemptive multitasking real-time systems with caches," ACM Trans. Embed. Comput. Syst., vol. 6, no. 1, p. 7, 2007.
4. R. Ghattas, G. Parsons, and A. Dean, "Optimal unified data allocation and task scheduling for real-time multi-tasking systems," in Real Time and Embedded Technology and Applications Symposium, 2007. RTAS '07. 13th IEEE, April 2007, pp. 168-182.
5. R. Ghattas, "Data allocation with real-time scheduling (DARTS)," Ph.D. dissertation, North Carolina State University, November 2006. [Online]. Available: http://www.lib.ncsu.edu/theses/available/etd- 11122006-115740/.
6. Y. Wang and M. Saksena, "Scheduling fixed-priority tasks with preemption threshold," in Real-Time Computing Systems and Applications, 1999. RTCSA '99. Sixth International Conference on, 1999, pp. 328-335.
7. OKI ML674000 (ARM7TDMI) Board. [Online]. Available:http://www.oki.com.
8. R. Barry, Free Real-Time Operating System (FreeRTOS), 2006. [Online]. Available: http://www.freertos.org/.
9. Compute Architecture and Network Laboratory, Seoul National University, Seoul, Korea. SNU Real-Time Benchmark Suite.
10. Mlardalen Real-Time Research Center (MRTC). The Worst-Case Execution Time (WCET) analysis project, Mlardalen University, Sweden.
11. J. Sjödin, B. Froderberg, and T. Lindgren, "Allocation of global data objects in on-chip ram," 1998. [Online]. Available: citeseer.ist.psu.edu/sjodin98allocation.html.
12. P. R. Panda, N. D. Dutt, and A. Nicolau, "On-chip vs. offchip memory: the data partitioning problem in embedded processor-based systems," ACM Trans. Des. Autom. Electron. Syst., vol. 5, no. 3, pp. 682-704.
13. J. Sjödin and C. von Platen, "Storage allocation for embedded processors," in CASES '01: Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems. New York, NY, USA: ACM, 2001, pp. 15-23.
14. M. Kandemir, J. Ramanujam, M. Irwin, N. Vijaykrishnan, I. Kadayif, and A. Parikh, "Dynamic management of scratchpad memory space," in Design Automation Conference, 2001. Proceedings, 2001, pp. 690-695.
15. Y. Cao, H. Tomiyama, T. Okuma, and H. Yasuura, "Data memory design considering effective bitwidth for low-energy embedded systems," in ISSS '02: Proceedings of the 15th international symposium on System Synthesis. New York, NY, USA: ACM, 2002, pp. 201-206.
16. J. D. Hiser and J. W. Davidson, "Embarc: an efficient memory bank assignment algorithm for retargetable compilers," SIGPLAN Not., vol. 39, no. 7, pp. 182-191, 2004.
17. M. Verma, L. Wehmeyer, and P. Marwedel, "Dynamic overlay of scratchpad memory for energy minimization," in CODES+ISSS '04: Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis. New York, NY, USA: ACM, 2004, pp. 104-109.
18. N. Nguyen, A. Dominguez, and R. Barua, "Memory allocation for embedded systems with a compile-time-unknown scratch-pad size," in CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems. New York, NY, USA: ACM, 2005, pp. 115-125.
19. O. Ozturk, M. Kandemir, and I. Kolcu, "Shared scratch-pad memory space management," in Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on, March 2006, pp. 6 pp.-584.
20. O. Avissar, R. Barua, and D. Stewart, "Heterogeneous memory management for embedded systems," in CASES '01: Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems. New York, NY, USA: ACM, 2001, pp. 34-43.
21. -, "An optimal memory allocation scheme for scratchpad based embedded systems," ACM Trans. Embed. Comput. Syst., vol. 1, no. 1, pp. 6-26, 2002.
22. V. Suhendra, T. Mitra, A. Roychoudhury, and T. Chen, "Wcet centric data allocation to scratchpad memory," in Real-Time Systems Symposium, 2005. RTSS 2005. 26th IEEE International, Dec. 2005, pp. 10 pp.-232.
23. J.-F. Deverge and I. Puaut, "Wcet-directed dynamic scratchpad memory allocation of data," in Real-Time Systems, 2007. ECRTS '07. 19th Euromicro Conference on, July 2007, pp. 179-190.
24. V. Suhendra, A. Roychoudhury, and T. Mitra, "Scratchpad allocation for concurrent embedded software," in CODES/ISSS '08: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis. New York, NY, USA: ACM, 2008, pp. 37-42.
25. R. Kirner and P. Puschner, "Classification of wcet analysis techniques," in Object-Oriented Real-Time Distributed Computing, 2005. ISORC 2005. Eighth IEEE International Symposium on, May 2005, pp. 190-199.
26. GNU ARM Toolchain. [Online]. Available: http://www.gnuarm.com.
27. J. Ferrante, K. J. Ottenstein, and J. D. Warren, "The program dependence graph and its use in optimization," ACM Trans. Program. Lang. Syst., vol. 9, no. 3, pp. 319-349, 1987.
28. A. G. Dean, "Software thread integration for embedded system display applications," ACM Trans. Embed. Comput. Syst., vol. 5, no. 1, pp. 116-151, 2006.
29. G. Pospischil, P. Puschner, A. Vrchoticky, and R. Zainlinger, "Developing real-time tasks with predictable timing," Software, IEEE, vol. 9, no. 5, pp. 35-44, Sep 1992.
30. P. Puschner and A. Schedl, "A tool for the computation of worst case task execution times," in Real-Time Systems, 1993. Proceedings., Fifth Euromicro Workshop on, Jun 1993, pp. 224-229.
31. P. P. Puschner and A. V. Schedl, "Computing maximum task execution times a graph-based approach," Real-Time Systems, vol. 13, no. 1, pp. 67-91, 1997. [Online]. Available: http://www.springerlink.com/content/ u44574n273706478.
32. ARM7 Architecture Manual. [Online]. Available:http://www.arm.com.