Dynamic management of scratch-pad memory space

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 690-695

  Kandemir, M ^a   Ramanujam, J ^a   Irwin, M J ^a   Vijaykrishnan, N ^a   Kadayif, I ^a   Parikh, A ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA TRANSFER; EMBEDDED SYSTEMS; MATRIX ALGEBRA; MICROPROCESSOR CHIPS; OPTIMIZATION; PROGRAM COMPILERS;

SCRATCH-PAD MEMORY (SPM) SPACE;

SEMICONDUCTOR STORAGE;

EID: 0034848113     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.379049     Document Type: Conference Paper

References (14)

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9. Architectural exploration and optimization of local memory in embedded systems
10. Memory exploration for low power, embedded systems
11. Optimizing on-chip memory usage through loop restructuring for embedded processors