A low-complexity message-passing algorithm for reduced routing congestion in LDPC decoders

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 57, Issue 5, 2010, Pages 1048-1061

  Mohsenin, Tinoosh ^a   Truong, Dean N ^a   Baas, Bevan M ^a  

^a Davis   (United States)

Author keywords

10GBASE T; 65 nm CMOS; 802.3an; Full parallel; High throughput; Low power; Low density parity check (LDPC); Message passing; Min sum; Nanometer

Indexed keywords

10GBASE-T; 802.3AN; HIGH THROUGHPUT; LOW POWER; MIN-SUM;

ALGORITHMS; BINARY CODES; CMOS INTEGRATED CIRCUITS; DECODING; ELECTRIC BATTERIES; ENERGY EFFICIENCY; MESSAGE PASSING;

THROUGHPUT;

EID: 77952959427     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2010.2046957     Document Type: Article

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