Fault tolerant network on chip switching with graceful performance degradation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 29, Issue 6, 2010, Pages 883-896

  Kohler, Adn ^a   Schley, Gert ^a   Radetzki, Martin ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

Adaptive routing; Graceful degradation; Network fault tolerance; Network on chip; Online fault diagnosis

Indexed keywords

ADAPTIVE ROUTING; GRACEFUL DEGRADATION; NETWORK FAULTS; NETWORK ON CHIP; ON-LINE FAULT DIAGNOSIS;

ADAPTIVE ALGORITHMS; DEGRADATION; FAILURE ANALYSIS; FAULT DETECTION; FAULT TOLERANCE; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; NETWORK COMPONENTS; ROUTING ALGORITHMS;

QUALITY ASSURANCE;

EID: 77952918914     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2010.2048399     Document Type: Conference Paper

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