Evaluation of on-chip networks using deflection routing

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn 2006, Issue , 2006, Pages 296-301

  Lu, Zhonghai ^a   Zhong, Mingchen ^a   Jantsch, Axel ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

Network on chip; Performance evaluation; System on chip communication network

Indexed keywords

ADAPTIVE ALGORITHMS; ALGORITHMS; MICROPROCESSOR CHIPS; PACKET SWITCHING; TOPOLOGY; VIRTUAL REALITY;

NETWORK-ON-CHIP; PERFORMANCE EVALUATION; ROUTING ALGORITHMS; SYSTEM-ON-CHIP COMMUNICATION NETWORK;

INTERCONNECTION NETWORKS;

EID: 33750928209     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1127908.1127977     Document Type: Conference Paper

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