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Volumn 5992 LNCS, Issue , 2010, Pages 231-243

Routing-aware application mapping considering steiner points for coarse-grained reconfigurable architecture

Author keywords

Coarse grained reconfigurable architecture; High level synthesis; Mapping; Routing

Indexed keywords

APPLICATION MAPPING; COARSE GRAINED RECONFIGURABLE ARCHITECTURE; COARSE-GRAINED; HEURISTIC MAPPING; HIGH LEVEL SYNTHESIS; INTEGER LINEAR PROGRAMMING; MAPPING ALGORITHMS; MAPPING PROCESS; MEDIABENCH; OPTIMAL FORMULATION; OPTIMAL SOLUTIONS; PERFORMANCE IMPROVEMENTS; ROUTING RESOURCES; SPANNING TREE; STEINER POINTS;

EID: 77951261673     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-12133-3_22     Document Type: Conference Paper
Times cited : (11)

References (15)
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  • 6
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    • Park, H.1    Fan, K.2    Mahlke, S.A.3    Oh, T.4    Kim, H.5    Kim, H.6
  • 7
    • 80051539788 scopus 로고    scopus 로고
    • Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
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    • Automatic mapping of application to coarse-grained reconfigurable architecture based on high-level synthesis techniques
    • Lee, G., Lee, S., Choi, K.: Automatic mapping of application to coarse-grained reconfigurable architecture based on high-level synthesis techniques. In: Proc. ISOCC (2008)
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  • 11
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    • Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture
    • Kim, Y., Park, I., Choi, K., Paek, Y.: Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture. In: Proc. ISLPED (2006)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.