Multilayered image processing for multiscale harris corner detection in digital realization

IEEE Transactions on Industrial Electronics

Volumn 57, Issue 5, 2010, Pages 1799-1805

  Hsiao, Pei Yung ^a   Lu, Chieh Lun ^b   Fu, Li Chen ^c  

^a NATIONAL UNIVERSITY OF KAOHSIUNG   (Taiwan)

^b MEDIATEK INC   (Taiwan)

^c NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Field programmable gate array (FPGA); Multilayered image processing; Multiscale Harris corner detection; Pattern recognition

Indexed keywords

HARRIS CORNER DETECTION; MULTI-LAYERED; MULTILAYERED IMAGE PROCESSING; MULTISCALES;

COMPUTER SOFTWARE; DETECTORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE PROCESSING; IMAGING SYSTEMS; LOGIC GATES; VERIFICATION;

PATTERN RECOGNITION SYSTEMS;

EID: 77951187927     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2010.2040556     Document Type: Article

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