A high-performance VLSI architecture for the histogram peak-climbing data clustering algorithm

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 2, 2006, Pages 111-121

  Hernandez, Orlando J ^a,b,c  

^a IEEE   (United States)

^b The College of New Jersey   (United States)

^c NATIONAL SCIENCE FOUNDATION   (United States)

Author keywords

Data clustering; High performance architectures; Peak climbing algorithm; Specialized architectures; VLSI design

Indexed keywords

COMPUTATIONALLY INTENSIVE TASK; DATA CLUSTERING; HIGH-PERFORMANCE ARCHITECTURES; IMAGE FEATURE SEPARATION; MPEG-2 STANDARD; PEAK CLIMBING ALGORITHM; SPECIALIZED ARCHITECTURES; UNSUPERVISED DATA CLUSTERING; VLSI DESIGN; XILINX;

ACCELERATION; ALGORITHMS; COMPUTER VISION; FIELD PROGRAMMABLE GATE ARRAYS; HARDWARE; IMAGE SEGMENTATION; INTEGRATION; NEURAL NETWORKS; REAL TIME SYSTEMS; SEMICONDUCTOR DEVICES; SOFTWARE PROTOTYPING; VIDEODISKS;

VLSI CIRCUITS;

EID: 33645009971     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2005.863761     Document Type: Article

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