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Volumn , Issue , 2008, Pages 267-270

Variational interconnect analysis for double patterning lithography

Author keywords

[No Author keywords available]

Indexed keywords

DOUBLE PATTERNING; INTERCONNECT ANALYSIS; INTERCONNECT COUPLING CAPACITANCE; INTERCONNECT LAYERS; INTERCONNECT TECHNOLOGY; TCAD SIMULATION;

EID: 77950851852     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (10)
  • 3
    • 84886448086 scopus 로고    scopus 로고
    • Modeling of pattern-dependent on-chip interconnect geometry variation for deepsubmicron process and design technology
    • O.S. Nakagawa, S.-Y. Oh and G. Ray, "Modeling of pattern-dependent on-chip interconnect geometry variation for deepsubmicron process and design technology," Proc. of International Electron Devices Meeting, 1997, pp. 137-140.
    • (1997) Proc. of International Electron Devices Meeting , pp. 137-140
    • Nakagawa, O.S.1    Oh, S.-Y.2    Ray, G.3
  • 4
    • 0034276317 scopus 로고    scopus 로고
    • Tradeoff between interconnect capacitance and RC delay variations induced by process fluctuations
    • N. Shigyo, 'Tradeoff between interconnect capacitance and RC delay variations induced by process fluctuations," IEEE Journal of Electron Devices, 47(9), 2000, pp. 1740-1744.
    • (2000) IEEE Journal of Electron Devices , vol.47 , Issue.9 , pp. 1740-1744
    • Shigyo, N.1
  • 8
    • 2942576140 scopus 로고    scopus 로고
    • Rapid method to account for process variation in full-chip capacitance extraction
    • A. Labun, "Rapid method to account for process variation in full-chip capacitance extraction," IEEE Journal of Computer-Aided Design, 23(12), 2004, pp. 1677-1683.
    • (2004) IEEE Journal of Computer-Aided Design , vol.23 , Issue.12 , pp. 1677-1683
    • Labun, A.1
  • 9
    • 34748905251 scopus 로고    scopus 로고
    • Statistical and corner modeling of interconnect resistance and capacitance
    • N. Lu, "Statistical and corner modeling of interconnect resistance and capacitance," Proc. of IEEE Custom Integrated Circuits Conference, 2006, pp. 853-856.
    • (2006) Proc. of IEEE Custom Integrated Circuits Conference , pp. 853-856
    • Lu, N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.