The superjunction insulated gate bipolar transistor optimization and modeling

IEEE Transactions on Electron Devices

Volumn 57, Issue 3, 2010, Pages 594-600

  Antoniou, Marina ^a   Udrea, Florin ^a   Bauer, Friedhelm ^b  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b ABB SWITZERLAND LTD   (Switzerland)

Author keywords

Field stop (FS) insulated gate bipolar transistor (IGBT); SPICE modeling; Superjunction (SJ)

Indexed keywords

BIPOLAR JUNCTION TRANSISTOR; DIRECT CURRENT; DRIFT REGIONS; HIGHER TEMPERATURES; MOS-FET; NEW DEVICES; OPTIMIZED CONDITIONS; PARALLEL COMBINATION; ROOM TEMPERATURE; SIMULATION RESULT; SPICE MODEL; SPICE MODELING; STATE PERFORMANCE; SUPERJUNCTION (SJ); SUPERJUNCTIONS; TURN-OFF LOSS;

ACTIVE FILTERS; BIPOLAR TRANSISTORS; INSULATED GATE BIPOLAR TRANSISTORS (IGBT); OPTIMIZATION; TUNNEL DIODES;

SPICE;

EID: 77649191797     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2039260     Document Type: Article

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