메뉴 건너뛰기




Volumn , Issue , 2009, Pages 109-114

A cache-aware thread scheduling policy for multi-core processors

Author keywords

Dynamic cache partitioning; Multi core processors; Parallel computing systems; Thread scheduling

Indexed keywords

CACHE CAPACITY; CACHE PARTITIONING; DYNAMIC CACHE; HIGH-PERFORMANCE PROCESSING; MULTI-CORE PROCESSOR; MULTIPLE THREADS; PARALLEL COMPUTING SYSTEM; PERFORMANCE DEGRADATION; PROCESSOR PERFORMANCE; RESOURCE CONFLICT; SHARED CACHE; THREAD CACHE; THREAD SCHEDULING;

EID: 74549184043     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (7)

References (14)
  • 1
    • 84976701936 scopus 로고
    • Limits of instruction-level parallelism
    • D. W. Wall. Limits of instruction-level parallelism. ACM SIGARCH Computer Architecture News, 19(2), 1991,176-188.
    • (1991) ACM SIGARCH Computer Architecture News , vol.19 , Issue.2 , pp. 176-188
    • Wall, D.W.1
  • 3
    • 0031237789 scopus 로고    scopus 로고
    • Simultaneous multithreading: A platform for next-generation processors
    • S. J. Eggers, J. S. Emer, H. M. Levy, J. L. Lo, R. L. Stamm, and D. M. Lullsen. Simultaneous multithreading: A platform for next-generation processors. IEEE Micro, 17(5), 1997, 12-19.
    • (1997) IEEE Micro , vol.17 , Issue.5 , pp. 12-19
    • Eggers, S.J.1    Emer, J.S.2    Levy, H.M.3    Lo, J.L.4    Stamm, R.L.5    Lullsen, D.M.6
  • 5
    • 34548042910 scopus 로고    scopus 로고
    • Utility-based cache partitioning: A low-overhead, high-performance, runtime mechanism to partition shared caches
    • M. K. Qureshi and Y. N. Patt. Utility-based cache partitioning: A low-overhead, high-performance, runtime mechanism to partition shared caches. Proc. 39th Annual IEEE/ACM International Symp. on Microarchitecture, 2006, 423-432.
    • (2006) Proc. 39th Annual IEEE/ACM International Symp. on Microarchitecture , pp. 423-432
    • Qureshi, M.K.1    Patt, Y.N.2
  • 10
    • 0034226001 scopus 로고    scopus 로고
    • Spec cpu2000: Measuring cpu performance in the new millennium
    • J. L. Henning. Spec cpu2000: Measuring cpu performance in the new millennium. IEEE Computer, 33(1), 2000, 28-35.
    • (2000) IEEE Computer , Issue.1 , pp. 28-35
    • Henning, J.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.