Data encoding for low-power in wormhole-switched networks-on-chip

12th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2009

Volumn , Issue , 2009, Pages 119-126

  Palesi, Maurizio ^a   Fazzino, Fabrizio ^a,b   Ascia, Giuseppe ^a   Catania, Vincenzo ^a  

^a UNIVERSITY OF CATANIA   (Italy)

^b Simply RISC LLP   (United Kingdom)

Author keywords

Coupling capacitance; Data encoding; Low power; Network on chip; Power analysis

Indexed keywords

CHIP AREAS; COMMUNICATION RESOURCES; COUPLING CAPACITANCE; DATA ENCODING; DATA STREAM; ENCODING SCHEMES; ENERGY CONSUMPTION; LOW POWER; LOW POWER NETWORKS; NETWORK INTERFACE; NETWORK ON CHIP; ON CHIP COMMUNICATION; POWER RATIO; RELIABLE COMMUNICATION; SCALABLE SOLUTION; SELF-SWITCHING; SILICON AREA; SWITCHED NETWORKS; SWITCHING ACTIVITIES; TOTAL POWER DISSIPATION;

CAPACITANCE; COMMUNICATION SYSTEMS; ELECTRIC NETWORK TOPOLOGY; ENCODING (SYMBOLS); ENERGY RESOURCES; MICROPROCESSOR CHIPS; SWITCHING CIRCUITS; TELECOMMUNICATION NETWORKS;

ROUTERS;

EID: 74549136801     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2009.203     Document Type: Conference Paper

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