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Volumn , Issue , 1996, Pages 370-379
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Evaluation of checkpoint mechanisms for massively parallel machines
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
FAILURE ANALYSIS;
FINITE AUTOMATA;
MATHEMATICAL MODELS;
MATHEMATICAL PROGRAMMING;
MICROPROCESSOR CHIPS;
NETWORK COMPONENTS;
SEMICONDUCTOR STORAGE;
STORAGE ALLOCATION (COMPUTER);
MIRROR CHECKPOINTING;
PARITY CHECKPOINTING;
PARTIAL PARITY CHECKPOINTING;
PARALLEL PROCESSING SYSTEMS;
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EID: 0029715009
PISSN: 07313071
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (38)
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References (10)
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