An integrated phase change memory cell with Ge nanowire diode for cross-point memory

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2007, Pages 98-99

  Zhang, Yuan ^a   Kim, SangBum ^a   McVittie, Jim P ^a   Jagannathan, Hemanth ^a   Ratchford, Josh B ^b   Chidsey, Christopher E D ^b   Nishi, Yoshio ^a   Wong, H S Philip ^a  

^a Stanford University   (United States)

^b STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELL GROWTH; CELLS; DIODES; ELECTRIC WIRE; ELECTROCHEMICAL ELECTRODES; GERMANIUM; HEALTH; LITHOGRAPHY; METALLIZING; NANOSTRUCTURED MATERIALS; NANOSTRUCTURES; NANOWIRES; SEMICONDUCTOR STORAGE; TRANSIENTS;

BOTTOM ELECTRODES; CONTACT AREAS; MEMORY ARRAYS; MEMORY CELLS; NANO WIRES; P N JUNCTIONS; PHASE CHANGE MEMORY CELLS; RESISTANCE RATIOS; REVERSE BIASES; SELECTIVE GROWTHS; SET PROGRAMMING; VLSI TECHNOLOGIES;

PHASE CHANGE MEMORY;

EID: 47249095732     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2007.4339742     Document Type: Conference Paper

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