Short-channel epitaxial germanium pMOS transistors

Thin Solid Films

Volumn 518, Issue 6 SUPPL. 1, 2010, Pages

  Eneman, G ^a,b,c   De Jaeger, B ^a   Wang, G ^a,b   Mitard, J ^a,b   Hellings, G ^a,b   Brunco, D P ^d   Simoen, E ^a   Loo, R ^a   Caymax, M ^a   Claeys, C ^a,b   De Meyer, K ^a,b   Meuris, M ^a   Heyns, M M ^a,b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c RESEARCH FOUNDATION FLANDERS FWO   (Belgium)

^d INTEL CORPORATION   (United States)

Author keywords

Epitaxy; Germanium; Junction leakage; Shallow Trench Isolation; Virtual substrates

Indexed keywords

EQUIVALENT OXIDE THICKNESS; GATE DIELECTRIC APPLICATIONS; GE TECHNOLOGY; GE-SEGREGATION; JUNCTION LEAKAGES; LEAKAGE COMPONENTS; LOW TEMPERATURE EPITAXIAL GROWTH; LOW TEMPERATURES; PATTERNED WAFERS; PMOS TRANSISTORS; SHALLOW TRENCH ISOLATION; SI SURFACES; SUPPLY VOLTAGES; THIN LAYERS; VIRTUAL SUBSTRATES;

CRYSTAL GROWTH; ELECTRIC FIELDS; GATE DIELECTRICS; GATES (TRANSISTOR); GERMANIUM; HETEROJUNCTION BIPOLAR TRANSISTORS; SEMICONDUCTING SILICON; SILICON WAFERS; SPEECH ANALYSIS; SURFACE SEGREGATION;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 73649095891     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.tsf.2009.10.063     Document Type: Article

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