Fabrication of high quality Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches

Thin Solid Films

Volumn 518, Issue 9, 2010, Pages 2538-2541

  Wang, G ^a,b   Loo, R ^a   Takeuchi, S ^a,c   Souriau, L ^a,c   Lin, J C ^a   Moussa, A ^a   Bender, H ^a   De Jaeger, B ^a   Ong, P ^a   Lee, W ^a   Meuris, M ^a   Caymax, M ^a   Vandervorst, W ^a,c   Blanpain, B ^b   Heyns, M M ^a,b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c KU LEUVEN   (Belgium)

Author keywords

Epitaxy; Ge; Shallow trench isolation; Threading dislocation density; Virtual substrates

Indexed keywords

CMOS DEVICES; DISLOCATION NETWORKS; HIGH QUALITY; HIGH TEMPERATURE; JUNCTION LEAKAGES; MOBILITY DEGRADATION; NMOSFET; PMOS FET DEVICES; PMOSFET; ROOT MEAN SQUARE ROUGHNESS; SELECTIVE EPITAXIAL GROWTH; SELECTIVE GROWTH; SHALLOW TRENCH ISOLATION; SHALLOW-TRENCH-ISOLATED; SI SUBSTRATES; SI(0 0 1); SUBMICRON; THREADING DISLOCATION; THREADING DISLOCATION DENSITIES; VIRTUAL SUBSTRATES;

CHEMICAL MECHANICAL POLISHING; CHEMICAL POLISHING; CRYSTAL GROWTH; FABRICATION; MOSFET DEVICES; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SINGLE CRYSTALS; SUBSTRATES;

GERMANIUM;

EID: 76049106189     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.tsf.2009.09.133     Document Type: Article

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