OpenMP extensions for FPGA accelerators

Proceedings - 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2009

Volumn , Issue , 2009, Pages 17-24

  Cabrera, Daniel ^a,b   Martorell, Xavier ^a,b   Gaydadjiev, Georgi ^c   Ayguade, Eduard ^a,b   Jiménez González, Daniel ^a,b  

^a BARCELONA SUPERCOMPUTING CENTER   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^c DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

BIT STREAM; CC-NUMA; DEVICE CONFIGURATIONS; LOW POWER; MATRIX MULTIPLICATION; MULTI CORE; OPERATIONAL MODES; PROGRAMMING COMPLEXITY; PROGRAMMING PARADIGMS; PROTOTYPE IMPLEMENTATIONS; RE-CONFIGURABLE; RECONFIGURABLE COMPUTING; RECONFIGURABLE DEVICES; RESEARCH AND DEVELOPMENT; RUNTIME SYSTEMS; SHARED MEMORIES;

BINARY CODES; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY ESTIMATION; SHAPE MEMORY EFFECT; SOFTWARE PROTOTYPING;

COMPUTER SIMULATION;

EID: 71949091742     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSAMOS.2009.5289237     Document Type: Conference Paper

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