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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3038, Issue , 2004, Pages 398-407

Defining synthesizable OpenMP directives and clauses

(2) Dziurzanski, P a Beletskyy, V a

a WEST POMERANIAN UNIVERSITY OF TECHNOLOGY (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMMING INTERFACES (API); HARDWARE; RECONFIGURABLE HARDWARE;

DE FACTO STANDARD; HARDWARE REALIZATION; PORTABLE IMPLEMENTATION; SHARED-MEMORY PARALLELS;

C (PROGRAMMING LANGUAGE);

EID: 35048831861 PISSN: 03029743 EISSN: 16113349 Source Type: Book Series
DOI: 10.1007/978-3-540-24688-6_53 Document Type: Article

Times cited : (8)

References (7)

1
- 0037660155
- OpenMP Architecture Review Board
- OpenMP C and C++ Application Program Interface, ver 2.0, OpenMP Architecture Review Board, 2002, www.openmp.org
- (2002) OpenMP C and C++ Application Program Interface, Ver 2.0

2
- 33645526005
- Nested Parallelism: Allocation of Processors to Tasks and OpenMP Implementations
- Edinburgh, Scotland, UK
- R. Blikberg, T. Sorevik, Nested Parallelism: Allocation of Processors to Tasks and OpenMP Implementations, Second European Workshop on OpenMP, Edinburgh, Scotland, UK, 2000
- (2000) Second European Workshop on OpenMP
- Blikberg, R.¹ Sorevik, T.²

3
- 0029483209
- The Transmogrifier C hardware description language and compiler for FPGAs
- D. Galloway, The Transmogrifier C hardware description language and compiler for FPGAs, Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines, 1995
- (1995) Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines
- Galloway, D.¹

4
- 35248864303
- PACTHDL: A C Compiler with Power and Performance Optimizations
- Grenoble, France
- A. Jones, D. Bagchi, S. Pal, X. Tang, A. Choudhary, P. Banerjee, PACTHDL: A C Compiler with Power and Performance Optimizations, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Grenoble, France, 2002
- (2002) International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)
- Jones, A.¹ Bagchi, D.² Pal, S.³ Tang, X.⁴ Choudhary, A.⁵ Banerjee, P.⁶

5
- 0030414049
- Scheduling and Partitioning ANSI-C Programs onto Multi-FPGA CCM Architectures
- Napa, California
- J.B. Peterson, R. Brendan O'Connor, P. M. Athanas, Scheduling and Partitioning ANSI-C Programs onto Multi-FPGA CCM Architectures, IEEE Symposium on FPGAs for Custom Configurable Computing Machines, Napa, California, 1996
- (1996) IEEE Symposium on FPGAs for Custom Configurable Computing Machines
- Peterson, J.B.¹ Brendan O'Connor, R.² Athanas, P.M.³

6
- 0033488498
- Parallelizing Applications into Silicon
- Los Alamitos, CA, USA
- J. Babb, M. Rinard, C.A. Moritz, W. Lee, M. Frank, R. Barua, S. Amarasinghe, Parallelizing Applications into Silicon, IEEE Symposium on FPGAs for Custom Computing Machines, Los Alamitos, CA, USA, 1999, pp. 70-80
- (1999) IEEE Symposium on FPGAs for Custom Computing Machines , pp. 70-80
- Babb, J.¹ Rinard, M.² Moritz, C.A.³ Lee, W.⁴ Frank, M.⁵ Barua, R.⁶ Amarasinghe, S.⁷

7
- 84957607980
- Incorporating Hardware Synthesis into a System Compiler
- Department of Electrical and Computer Engineering University of California, Santa Barbara, CA, USA
- R. Kastner, M. Sarrafzadeh, Incorporating Hardware Synthesis into a System Compiler, Technical Report, Department of Electrical and Computer Engineering University of California, Santa Barbara, CA, USA
- Technical Report
- Kastner, R.¹ Sarrafzadeh, M.²

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.