System-level runtime mapping exploration of reconfigurable architectures

IPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium

Volumn , Issue , 2009, Pages

  Sigdel, Kamana ^a   Thompson, Mark ^b   Pimentel, Andy D ^b   Galuzzi, Carlo ^a   Bertelsy, Koen ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b UNIVERSITY OF AMSTERDAM   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP AREAS; DESIGN CONSTRAINTS; DESIGN DECISIONS; DESIGN PROCESS; DYNAMIC RECONFIGURABLE SYSTEM; NON-FUNCTIONAL; POWER CONSUMPTION; RECONFIGURABLE ARCHITECTURE; RECONFIGURABLE SYSTEMS; RUN-TIME MAPPING; RUNTIMES; SYSTEM LEVELS; TASK MAPPING;

DISTRIBUTED PARAMETER NETWORKS; MAPPING;

STRUCTURAL DESIGN;

EID: 70449905244     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2009.5161199     Document Type: Conference Paper

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