System-level design space exploration of dynamic reconfigurable architectures

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5114 LNCS, Issue , 2008, Pages 279-288

  Sigdel, Kamana ^a   Thompson, Mark ^b   Pimentel, Andy D ^b   Stefanov, Todor ^a   Bertels, Koen ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b UNIVERSITY OF AMSTERDAM   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER NETWORKS; COMPUTER SYSTEMS; EMBEDDED SYSTEMS; LARGE SCALE SYSTEMS; PARAMETER ESTIMATION; SPACE RESEARCH;

DESIGN PARAMETERS; EMBEDDED COMPUTER SYSTEMS; SYSTEM PERFORMANCES;

STRUCTURAL DESIGN;

EID: 50649120383     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-70550-5_31     Document Type: Conference Paper

References (10)

1. Noguera, J., Badia, R.M.: System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures. In: CASES 2003: Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, pp. 73-83. ACM, New York (2003)
2. Hsiung, P., Lin, S., Chen, Y., Huang, C.: Perfecto: A SystemC-based performance evaluation framework for dynamically partially reconfigurable systems. In: FPL 2006: Proceedings of the Conference on Field Programmable Logic and Applications, pp. 1-6. IEEE, Los Alamitos (2006)
3. Rissa, T., Vasilko, M., Niittylahti, J.: System-level modelling and implementation technique for run-time reconfigurable systems. In: FCCM 2002: Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, p. 295. IEEE Computer Society, Washington (2002)
4. Qu, Y., Soininen, J.P.: Systemc-based design methodology for reconfigurable system-on-chip. In: DSD 2005: Proceedings of the 8th Euromicro Conference on Digital System Design, pp. 364-371. IEEE Computer Society, Washington (2005)
5. Erbas, C., Pimentel, A.D., Thompson, M., Polstra, S.: A framework for systemlevel modeling and simulation of embedded systems architectures. EURASIP J. Embedded Syst. 2007(1) (2007)
6. Vassiliadis, S., Wong, S., Gaydadjiev, G.N., Bertels, K., Kuzmanov, G., Panainte, E.M.: The molen polymorphic processor. IEEE Transactions on Computers 53(11), 1363-1375 (2004)
7. Vassiliadis, S., Gaydadjiev, G.N., Bertels, K., Panainte, E.M.: The molen programming paradigm. In: Pimentel, A.D., Vassiliadis, S. (eds.) SAMOS 2004. LNCS, vol. 3133, pp. 1-10. Springer, Heidelberg (2004)
8. Kahn, G.: The semantics of a simple language for parallel programming. In: Proc. of the IFIP Congress 74 (1974)
9. Pimentel, A.D., Thompson, M., Polstra, S., Erbas, C.: Calibration of abstract performance models for system-level design space exploration. Journal of Signal Processing Systems for Signal, Image, and Video Technology 50(2), 99-114 (2008)
10. Verdoolaege, S., Nikolov, H., Stefanov, T.: PN: a tool for improved derivation of process networks. EURASIP Journal on Embedded Systems 2007(1), 13 (2007)