Efficient heuristics for minimizing communication overhead in NoC-based heterogeneous MPSoC platforms

Proceedings of the International Workshop on Rapid System Prototyping

Volumn , Issue , 2009, Pages 55-60

  Singh, Amit Kumar ^a   Wu, Jigang ^a   Prakash, Alok ^a   Srikanthan, Thambipillai ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Mapping heuristic; Multiprocessor system onchip (MPSoC) design; NoC; Run time mapping

Indexed keywords

CHANNEL LOADS; CLOSE PROXIMITY; COMMUNICATION OVERHEADS; COMPUTATION PERFORMANCE; EXECUTION TIME; HETEROGENEOUS MULTIPROCESSOR SYSTEMS; HIGH-SPEED; MAPPING APPLICATIONS; MULTIPROCESSOR SYSTEM-ONCHIP (MPSOC) DESIGN; NOC; REAL TIME CONSTRAINTS; RUN-TIME MAPPING;

ELECTRIC NETWORK TOPOLOGY; FAULT TOLERANCE; HEURISTIC METHODS; MULTIPROCESSING SYSTEMS; QUALITY ASSURANCE; SPECIFICATIONS;

MAPPING;

EID: 70350643908     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RSP.2009.18     Document Type: Conference Paper

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